Tsu-Jae King Liu
Professor, Associate Chair
Tsu-Jae King Liu received the B.S., M.S. and Ph.D. degrees in Electrical Engineering from Stanford University in 1984, 1986 and 1994, respectively. She joined the Xerox Palo Alto Research Center as a Member of Research Staff in 1992, to research and develop polycrystalline-silicon thin-film transistor technologies for high-performance flat-panel display and imaging applications. During her tenure with Xerox PARC, she served as a Consulting Assistant Professor of Electrical Engineering at Stanford University. In August 1996, she joined the faculty of the University of California, at Berkeley, where she is now the Conexant Systems Distinguished Professor of Electrical Engineering and Computer Sciences (EECS) and the Associate Chair of the Department. From 2000 to 2004 and from 2006 to 2008, she served as the Faculty Director of the UC Berkeley Microfabrication Laboratory. From 2008 through 2008, Professor King Liu was the Associate Dean for Research in the College of Engineering at UC Berkeley. From July 2004 through June 2006 she was Senior Director of Engineering in the Advanced Technology Group of Synopsys, Inc. (Mountain View, CA).
Professor King Liu's awards include the Ross M. Tucker AIME Electronics Materials Award (1992) for seminal work in polycrystalline silicon-germanium thin films; an NSF CAREER Award (1998) for research in thin-film transistor technology; the DARPA Significant Technical Achievement Award (2000) for development of the FinFET; the Electrical Engineering Award for Outstanding Teaching at UC Berkeley (2003); the IEEE Kiyo Tomiyasu Award (2010) for contributions to nanoscale MOS transistors, memory devices, and MEMS devices; the UC Berkeley Faculty Mentor Award (2010); and the Electrochemical Society Dielectric Science and Technology Division Thomas D. Callinan Award (2011) for excellence in dielectrics and insulation investigations. Her research activities are presently in nanometer-scale logic and memory devices, and advanced materials, process technology, and devices for energy-efficient electronics. She has authored or co-authored close to 400 publications and holds over 80 patents.
Professor King Liu is a Fellow of the IEEE, and a past member of The Electrochemical Society (ECS), the Society for Information Display (SID), and the Materials Research Society (MRS).
- Y. Chen, R. Nathanael, J. Jeon, J. Yaung, L. Hutin, and T. King Liu, "Characterization of Contact Resistance Stability in MEM Relays With Tungsten Electrodes," Journal of Microelectromechanical Systems, vol. 21, no. 3, pp. 511-513, June 2012.
- S. O. Toh, Z. Guo, T. King Liu, and B. Nikolic, "Characterization of Dynamic SRAM Stability in 45 nm CMOS," Solid-State Circuits, IEEE Journal of, vol. 46, no. 11, pp. 2702-2712, Nov. 2011.
- W. Kwon and T. King Liu, "Compact NAND Flash Memory Cell Design Utilizing Backside Charge Storage," in 2010 IEEE Silicon Nanoelectronics Workshop, 2010.
- W. Kwon and T. King Liu, "A Highly Scalable 4FH<sub>2</sub> DRAM Cell Utilizing a Doubly Gated Vertical Channel," in International Conference on Solid State Devices and Materials, THE JAPAN SOCIETY OF APPLIED PHYSICS, 2009.
- N. Xu, X. Sun, L. Wang, A. R. Neureuther, and T. King Liu, "Predictive compact modeling for strain effects in nanoscale transistors," in 2009 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD 2009), 2009.
- J. Lai and T. King Liu, "Defect passivation by selenium ion implantation for poly-Si thin film transistors," IEEE Electron Device Letters, vol. 28, no. 8, pp. 725-727, Aug. 2007.
- D. Good, P. Wickboldt, and T. King Liu, "Defect passivation in poly-Si TFTs by ion implantation and pulsed laser annealing," IEEE Electron Device Letters, vol. 27, no. 10, pp. 840-842, Oct. 2006.
- S. Xiong, T. King Liu, and J. Bokor, "A comparison study of symmetric ultrathin-body double-gate devices with metal source/drain and doped source/drain," IEEE Trans. Electron Devices, vol. 52, no. 8, pp. 1859-1867, Aug. 2005.
- Z. Guo, S. Balasubramanian, R. Zlatanovici, T. King Liu, and B. Nikolic, "FinFET-based SRAM design," in Proc. ISLPED '05, Piscataway, NJ: IEEE, 2005, pp. 2-7.
- M. Eyoum and T. King Liu, "Low resistance silicon-germanium contact technology for modular integration of MEMS with electronics," J. Electrochemical Society, vol. 151, no. 3, pp. J21-J25, Feb. 2004.
- P. Xuan, M. She, B. Harteneck, A. Liddle, J. Bokor, and T. King Liu, "FinFET SONOS flash memory for embedded applications," in 2003 Intl. Electron Devices Meeting (IEDM '03). Technical Digest, Piscataway, NJ: IEEE Press, 2003, pp. 609-612.
- A. E. Franke, J. M. Heck, T. King Liu, and R. T. Howe, "Polycrystalline silicon-germanium films for integrated microsystems," J. Microelectromechanical Systems, vol. 12, no. 2, pp. 160-171, April 2003.
- M. She, H. Takeuchi, and T. King Liu, "Improved SONOS-type flash memory using HfO2 as trapping layer," in 19th IEEE Non-Volatile Semiconductor Memory Workshop Digest, Piscataway, NJ: IEEE, 2003, pp. 53-55.
- B. Yu, L. Chang, S. Ahmed, H. Wang, S. Bell, C. Yang, C. Tabery, C. Ho, Q. Xiang, T. King Liu, J. Bokor, C. Hu, M. Lin, and D. Kyser, "FinFET scaling to 10nm gate length," in 2002 IEEE Intl. Electron Devices Meeting Technical Digest, Piscataway, NJ: IEEE Press, 2002, pp. 251-254.
- B. Yu, L. Chang, S. Ahmed, H. Wang, S. Bell, C. Yang, C. Tabery, C. Ho, T. King Liu, J. Bokor, M. Lin, and D. Kyser, "FinFET scaling: Towards 10nm gate length," in IEDM '02 Technical Digest, Piscataway, NJ: IEEE Press, 2002, pp. 251-254.
- C. Kuo, T. King Liu, and C. Hu, "A capacitorless double-gate DRAM cell," IEEE Electron Device Letters, vol. 23, no. 6, pp. 345-347, June 2002.
- Y. Choi, T. King Liu, and C. Hu, "A spacer patterning technology for nanoscale CMOS," IEEE Trans. Electron Devices, vol. 49, no. 3, pp. 436-441, March 2002.
- Y. Yeo, V. Subramanian, J. Kedzierski, P. Xuan, T. King Liu, J. Bokor, and C. Hu, "Design and fabrication of 50-nm thin-body p-MOSFETs with a SiGe heterostructure channel (Paul Rappaport Award for 2002)," IEEE Trans. Electron Devices, vol. 49, no. 2, pp. 279-286, Feb. 2002.
- D. Hisamoto, W. Lee, J. Kedzierski, H. Takeuchi, K. Asano, C. Kuo, E. Anderson, T. King Liu, J. Bokor, and C. Hu, "FinFET--A self-aligned double-gate MOSFET scalable to 20 nm," IEEE Trans. Electron Devices, vol. 47, no. 12, pp. 2320-2325, Dec. 2000.
- S. D. Theiss, P. G. Carey, P. M. Smith, P. Wickboldt, T. W. Sigmon, Y. J. Tung, and T. King Liu, "Polysilicon thin film transistors fabricated at 100°C on a flexible plastic substrate," in International Electron Devices Meeting 1998 Technical Digest, Piscataway, NJ: IEEE, 1998, pp. 257-260.