SC1110090807 0605040302
PPoPP1110090807 060503
ICS1110090807 0605040302
IPDPS1110090807 0605040302
ISCA1110090807 0605040302
ASPLOS11100908 060402
MICRO1110090807 0605040302
HPCA1110090807 0605040302

391 A comparison of software and hardware techniques for x86 virtualization
278 Hybrid transactional memory
260 Exploiting coarse-grained task, data, and pipeline parallelism in stream programs
200 Accelerator: using data parallelism to program GPUs for general-purpose uses
158 AVIO: detecting atomicity violations via access interleaving invariants
158 Accurate and efficient regression modeling for microarchitectural performance and power prediction
139 Supporting nested transactional memory in logTM
135 Efficiently exploring architectural design spaces via predictive modeling
114 Mercury and freon: temperature emulation and management for server systems
107 PicoServer: using 3D stacking technology to enable a compact energy efficient chip multiprocessor
91 Geiger: monitoring the buffer cache in a virtual machine environment
87 Unbounded page-based transactional memory
85 Ultra low-cost defect protection for microprocessor pipelines
81 Recording shared memory dependencies using strata
78 Computation spreading: employing hardware migration to specialize CMP cores on-the-fly
71 Tradeoffs in transactional memory virtualization
68 A regulated transitive reduction (RTR) for longer memory race recording
64 Combinatorial sketching for finite programs
56 A performance counter architecture for computing accurate CPI components
41 Bell: bit-encoding online memory leak detection
41 Introspective 3D chips
40 A spatial path scheduling algorithm for EDGE architectures
35 Software-based instruction caching for embedded processors
31 Temporal search: detecting hidden malware timebombs with virtual machines
29 SlicK: slice-based locality exploitation for efficient redundant multithreading
29 A defect tolerant self-organizing nanoscale SIMD architecture
26 Integrated network interfaces for high-bandwidth TCP/IP
25 Understanding prediction-based partial redundant threading for low-overhead, high- coverage fault tolerance
25 Comprehensively and efficiently protecting the heap
25 Mapping esterel onto a multi-threaded embedded processor
24 Tartan: evaluating spatial computation for whole program execution
24 HeapMD: identifying heap-based bugs using anomaly detection
23 Automatic generation of peephole superoptimizers
21 Stealth prefetching
20 A probabilistic pointer analysis for speculative optimizations
18 Instruction scheduling for a tiled dataflow architecture
7 A new idiom recognition framework for exploiting hardware-assist instructions
3 Impact of virtualization on computer architecture and operating systems
2 A program transformation and architecture support for quantum uncomputation