CURRENT Ph.D. STUDENTS

NAME RESEARCH AREA graduating
FUNDING SOURCE
I-Ru "Tim" Chen Advanced materials for micro-relay technology ~2014 MARCO Materials, Structures, and Devices Focus Center
Yenhao "Philip" Chen Investigations of relay reliability ~2014 MARCO Materials, Structures, and Devices Focus Center
Min Hee Cho
Capacitorless DRAM devices and technology
2012

Samsung Electronics, Inc.

MARCO Center for Circuits and Systems Solutions

Nattapol Damrongplasit
Study of variability for advanced transistor designs
~2013

MARCO Center for Circuits and Systems Solutions

Integrated Modeling Process and Computation for Technology Program

Byron Ho
High-mobility channel materials for nanoscale MOSFETs
~2013
Semiconductor Research Corporation
Zachery Jacobson
Tunnel FET design optimization and benchmarking
~2012
Intel Corporation
Sung Hwan Kim
Germanium-source tunnel FETs
2012
NSF Center for Energy Efficient Electronics Science
Wook Hyun Kwon
Novel non-volatile memory devices
~2013
Samsung Electronics, Inc.
Peter Matheu
Tunneling devices and technology
2012
NSF Center for Energy Efficient Electronics Science
Rhesa Nathanael
Relay design and technology for ultra-low-power digital integrated circuits 2012
DARPA/MTO NEMS Program
Eung Seok Park Printed MEMS technology ~2013 DARPA/MTO NEMS Program
Nuo Xu Predictive modeling for advanced CMOS technologies ~2012 Integrated Modeling Process and Computation for Technology Program
Jack Yaung milliVolt relay technology
~2013

NSF Center of Nanomechanical Systems, NSF Center for Energy Efficient Electronics Science


    FORMER Ph.D. STUDENTS

    NAME
    PhD THESIS
    graduated
    EMPLOYER
    Sriram Balasubramanian
    Nanoscale Thin-Body MOSFETs: Technology and Applications
    2006
    GlobalFoundries (Sunnyvale, CA)
    Andrew Carlson
    Device and Circuit Techniques for Reducing Variation in Nanoscale SRAM
    2008
    Advanced Micro Devices (Boston, MA)
    Marie-Ange Eyoum
    Modularly Integrated MEMS Technology
    2006
    Intel Corporation (Santa Clara, CA)
    Andrea E. Franke Polycrystalline Silicon-Germanium Films for Integrated Microsystems
    2000
    (deceased)
    Daniel Good
    Novel Processes for Poly-Si Thin-Film Transistors on Plastic Substrates
    2007
    (consultant)
    Xuejue Huang
    Modeling and Design Optimization of Multi-GHz IC Interconnects
    2002
    Intel Corporation (Phoenix, AZ)
    Jaeseok Jeon Advanced Relay Design and Technology for Energy-Efficient Electronics 2011 Rutgers, The State University of New Jersey (Piscataway, NJ)
    Qing Ji
    Maskless, Resistless Ion Beam Lithography Processes
    2003
    Lawrence Berkeley National Laboratory (Berkeley, CA)
    Pankaj Kalra
    Advanced Source/Drain Technologies for Nanoscale CMOS
    2008
    SanDisk Corporation (Milpitas, CA)
    Hei Kam MOSFET Replacement Devices for Energy-Efficient Digital Integrated Circuits 2010 Intel Corporation (Hillsboro, OR)
    Joanna Lai
    Novel Processes and Structures for Low Temperature Fabrication of Integrated Circuit Devices
    2008
    SanDisk Corporation (Milpitas, CA)
    Donovan Lee Nanoelectromechanical Systems (NEMS) Devices and Technology 2009 SanDisk Corporation (Milpitas, CA)
    Alvaro Padilla
    Advanced Transistor Structures and Charge Detection Methods for Flash Memory
    2007
    IBM Almaden Reseach Center (San Jose, CA)
    Pushkar Ranade
    Advanced Gate Materials and Processes for Sub-70nm CMOS Technology
    2002
    SuVolta, Inc. (Los Gatos, CA)
    Min She
    Semiconductor Flash Memory Scaling
    2003
    Sandisk (Milpitas, CA)
    Changhwan Shin Advanced MOSFET Designs and Implications for SRAM Scaling 2011 Xilinx (San Jose, CA)
    Kyoungsub Shin
    Technologies for Enhancing Multi-Gate Si MOSFET Performance
    2007
    Samsung Electronics, Inc. (Republic of Korea)
    Xin Sun Nanoscale Bulk MOSFET Design and Process Technology for Reduced Variability 2010 Crossbar Inc. (Santa Clara, CA)
    Yeh-Jiun Tung
    Polycrystalline Silicon Thin-Film Transistor Technology for Flexible Large-Area Electronics
    2001
    Qualcomm MEMS Technologies (San Jose, CA)
    Varadarajan Vidya
    Thin-Body FET Devices and Technology
    2007
    IBM Corporation (East Fishkill, NY)
    Reinaldo Vega Advanced Source/Drain and Contact Design for Nanoscale CMOS 2010 IBM Corporation (East Fishkill, NY)
    Hiu Yung Wong
    Advanced gate processes for nanoscale CMOS 2006
    Synopsys (Mountain View, CA)

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    STUDENTS SERVED AS Ph.D. RESEARCH CO-ADVISOR

    NAME
    PhD THESIS
    graduated
    EMPLOYER
    Leland Chang
    Nanoscale Thin-Body CMOS Devices
    2003
    IBM Corporation (Yorktown Heights, NY)
    Yang-Kyu Choi
    Nanofabrication Technologies and Novel Device Structures for Nanoscale CMOS
    2001
    KAIST (Republic of Korea)
    Daewon Ha
    Advanced materials and structures for nanoscale CMOS 2004
    Samsung Electronics (Republic of Korea)
    John M. Heck
    Polycrystalline Silicon Germanium for Fabrication, Release, and Packaging of Microelectromechanical Systems
    2001
    Intel Corporation (Santa Clara, CA)
    Ya-Chin King
    Thin Dielectric Technology and Memory Devices
    1999
    National Tsing Hua University (Hsinchu, Taiwan R.O.C.)
    Charles Kuo
    Scaling CMOS Memories
    2002
    Intel Corporation (Santa Clara, CA)
    Wen-Chin Lee
    Poly-Si1-xGex Gate Technology and Direct-Tunneling Oxide for Deep-Submicron CMOS Application
    1999
    Taiwan Semiconductor Manufacturing Company (Hsinchu, Taiwan R.O.C.)
    Blake C. Lin
    Integrated MEMS Technologies for Adaptive Optics
    2008
    Intel Corporation (Hillsboro, OR)
    Nick Lindert
    Process Development and Device Design for Continued MOSFET Scaling
    2001
    Intel Corporation (Hillsboro, OR)
    Gang Liu
    CMOS Power Amplifiers
    2006
    Marvell Semiconductor, Inc. (Milpitas, CA)
    Carrie W. Low
    Novel Processes for Modular Integration of SiGe MEMS with CMOS Electronics
    2006
    Silicon Clocks, Inc. (Fremont, CA)
    Qiang Lu
    Advanced Gate Stack Materials and Processes for Sub-100nm CMOS Applications
    2002
    Synopsys (Mountain View, CA)
    Igor Polishchuk
    Gate Stack for Sub-50nm CMOS Devices: Materials, Engineering and Modeling
    2002
    Cypress Semiconductor (San Jose, CA)
    Kevin Yang
    Characterization and Modeling of Advanced Gate Dielectrics
    2002
    GLOBALFOUNDRIES (Sunnyvale, CA)
    Yee-Chia Yeo
    Gate-Stack and Channel Engineering for Advanced CMOS Technology
    2002
    National University of Singapore (Singapore)

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    Last updated October 2, 2011