@COMMENT This file was generated by bib2html.pl <https://sourceforge.net/projects/bib2html/> version 0.94
@COMMENT written by Patrick Riley <http://sourceforge.net/users/patstg/>
@COMMENT This file came from Sanjit Seshia's publication pages at http://www.eecs.berkeley.edu/~sseshia
@inproceedings{li-selse13,
  author    = {Wenchao Li and Susmit Jha and Sanjit A. Seshia},
  title     = {Generating Control Logic for Optimized Soft Error Resilience},
 booktitle = {Proc. 9th Workshop on Silicon Errors in Logic - System Effects (SELSE)},
 month = "March",
 year = {2013},
 abstract = {Aggressive technology scaling has necessitated the 
development of techniques to ensure resilience to device faults, 
including soft errors, circuit wear-out, variability, and environmental 
effects. All error resilience techniques employ some form 
of redundancy, resulting in added cost such as area or power 
overhead. Existing selective hardening techniques have been 
focused on identifying on the most vulnerable components and 
then statically harden them. This paper proposes a new technique 
that can further reduce this overhead for error resilience mechanisms 
that are controllable. The key idea is to generate control 
predicates1 that can turn the resilience mechanisms ON and 
OFF dynamically, at the right time. These predicates are mined 
using an optimization formulation that leverages fault injection 
simulation information. Our experimental results demonstrate 
that our approach significantly outperforms the static hardening 
approach for optimizing soft error resilience.},
}