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Louis Poblete Alarcón Ph.D. Graduate Student (2009) EECS Department, UC Berkeley Area: Integrated Circuits
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Louis P. AlarcÓn |
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Sense Amplifier-based Pass Transistor Logic (SAPTL) Advisor: Prof. Jan M. Rabaey The SAPTL is an alternative circuit topology that allows the reduction of energy per operation via voltage scaling even in the presence of leakage. It allows aggressive threshold voltage scaling since the Vth of the stack transistors can now be decoupled with its subthreshold leakage, allowing for very low threshold voltages and thus allowing the stack transistors to remain in the superthreshold region. In addition, the differential signaling used by the SAPTL lends itself to synchronous and asynchronous operation and the inherent layout regularity points to the SAPTL as a very good candidate for robust ultra low energy operation.
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Louis P. Alarcón, EE Grad Student 205 Cory Hall #1772 UC Berkeley Berkeley, Ca 94720-1772 E-mail: lalarcon @ eecs . berkeley . edu |
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Publications: L. Alarcón, T.-T. Liu, M. Pierson, and J. Rabaey, “Exploring Very Low-energy Logic: A Case Study”, Journal of Low Power Electronics, vol. 3, no. 3, pp. 223–233, Dec. 2007 T.-T. Liu, L. Alarcón, M. Pierson, and J. Rabaey, “Asynchronous Computing in Sense Amplifier-based Pass Transistor Logic”, Proceedings of International Symposium on Asynchronous Circuits and Systems (ASYNC), 2008 |