




CS250: VLSI Systems Design
Spring 2007
Scroll down for paper reading assignments.
Tu,Th 11:00-12:30
310 Soda Hall
Course Goals:
All good design begins with careful analysis. What does a computer
architect need to know about VLSI? This new version of the course deals with
the analysis of VLSI systems with an emphasis emerging trends in IC technology,
chip architectures, and design methodologies..
It is not a "how to" for IC design. It is geared particularly to the
computer architect with the goal of understanding better
the underlying implementation technology.
This course is intended to give system
designers the knowledge needed to understand the issues involved in
implementing systems on VLSI chips. It is also suitable for those
interested in pursuing research in CAD tools for IC design, or
advanced research in VLSI. In the past, this course centered on
hands-on experience using modern CAD tools to implement VLSI designs,
i.e. design synthesis. The emphasis now is on design analysis
.
Course Content:
Foucs topics include:
- Power Consumption.
- Basic principles. Parallelism and power. Circuit and system-level techniques for power-aware design.
- Trends in Processing.
- Process variability, device reliability, and implications for circuit and architectures.
New materials and devices. The end of Moore law. Nanowires, etc.
- System Implementation Alternatives.
- Microprocessors vs. FPGAs vs. ASIC vs. full-custom vs. many-core.
Implications on cost/performance/power and design methods. Systems-on-chip, -in-package.
- Asynchronous versus Synchronous Logic and System Design.
- Self-timed and asynchronous signaling methodologies and circuits. Mixed approaches, GALS.
- On-chip Interconnects in the Modern Era.
- Networks-on-chip, coding for power and reliability, multi-voltage signaling.
- Design tools and methods.
State of computer aided design, testing, and verification. The role of emulation and RAMP ideas. The theory of bugs.
Working Schedule:
Roughly, two weeks per topic. One week of introductory lectures
and discussion, followed by one week of student led discussion
of assigned readings.
Projects:
Project Guidelines and Ideas.
If I come up with more project ideas, I will post
another batch Saturday evening.
Project Oral Presentation Schedule:
- 5/1: Louis, Jue Sun, Adam, Greg
- 5/3: {Bobak, Donald}, Eric, {Shah, Sameer, Aaron, Tim}, {Terry, Vinayak}
- 5/8: Juliet, Alex K., {Zhangxi, Marghoob, Alex E.}, Yury, Peter
Project Oral Presentation Guidelines, here.
Project Written Report Due May 11 11:59pm, guidelines are here.
Papers:
Click on each paper name to retreive it (access restricted to the eecs domain).
Written Review Guidelines.
Write one review per paper and turn it in before class.
Mail me, if you would like
to present one of these in class.
Oral Paper-Presentation Guidelines.
Reading assignment for 1/30:
- anantha_2: Classic paper on low-power techniques at all levels.
- leakage_intro: General introduction leakage power.
- overview: Low power circuits and more.
- ibm-soc: Architecture with dynamic voltage and frequency scaling.
Reading assignment for 2/1:
- laptop: Measurements on laptop power consumption.
- sun: Recent paper on Sun Niagara design.
- 2005_wang_jssc_jan: Very low power design example.
- gsm: Low-power SOC example.
Reading assignment for 2/13:
- ret_ibm: Fundamentals of optical lithography and resolution enhancement techniques. (Eric Chin)
- bernstein: Device variability due to processing. (Eric Chin)
- horowitz: "The Future of Wires", Modeling of on-chip interconnects.
- cooling_overview: An overview of techniques for cooling microprocessors.
Reading assignment for 2/15:
- future_mos_ibm: Approaches to continuing CMOS scaling by introducing new device structures and materials. (Long paper - counts as 2)
- flash_intro: Introduction to flash memory technology and associated scaling challenges. (Marghoob Mohiyuddin)
Reading assignment for 2/27:
(Papers 1-3 are short and count together as one)
- keutzer_custom_vs_asic: Closing the Gap Between ASIC and Custom: An ASIC Perspective. (Sameer Iyengar)
- adder_bitslice_vs_asic: Full-Custom vs. Standard-Cell Design Flow - An Adder Case Study. (Sameer Iyengar)
- dally_custom_in_asic: The Role of Custom Design in ASIC Chips. (Sameer Iyengar)
- rose_2006: Measuring the Gap Between FPGAs and ASICs. (Peter Yu)
- sop: SOP: What is it and Why? A New Microsystem-Integration Technology Paradigm-Moore's Law for System Integration of Miniaturized Convergent Systems of the Next Decade. (Alex Elium)
Reading assignment for 3/1:
- cpu_fpga_vs_asic: Implementation of a RISC Processor Core for SoC Designs - FPGA Prototype vs. ASIC Implementation. (Alex Elium)
- garp: The Garp Architecture and C Compiler. (Jue Sun)
- bee_vs_DSP: BEE2: A High-End Reconfigurable Computing System. (Greg Gibeling)
Reading assignment for 3/15:
The first five papers are short and in two groups for purposes of review and presentation.
- vonBerkelChapter0: Brief introduction to transitions and other asychronous circuit concepts,
seitz: From chapter 7 of Mead and Conway. Classic introduction to self-timed circuits.
- Beerel: Brief overview of asynchronous circuit techniques,
martin06: Introduction to asynchonous techniques and their advantages,
vanBerkel: pages 11-16 only (PDF pages 15-20). What can go wrong with "isochronic forks".
- sutherland: Micropipelines, Turing Lecture.
Reading assignment for 3/19:
- tangram: The VLSI-programming language Tangram and its translation into handshake circuits. (Aaron Staley)
- miniMIPS: The Design of an Asynchronous MIPS R3000 Microprocessor. (Shah Bawany)
- fulcrum: Asynchronous Interconnect for Synchronous DOC Design. (Terry Filiba)
Interesting Optional Reading:
- epson: Flexible Electronics.
- martin05: Long paper overview paper.
Reading assignment for 4/10:
- benini: Network-on-chip architectures and design nethods. (Zhangxi)
- dally2001: Route Packets, Not Wires: On-Chip Interconnection Networks. (Juliet)
- marculescu2006: Computation and Communication Refinement for Multiprocessor Soc Design: A System-Level Perspective. (Yury)
Reading assignment for 4/12:
- trips_noc: Implementation and Evaluation of On-Chip Network Architectures. (Aaron)
- worm2004: A Robust Self-Calibrating Transmission Scheme for On-Chips Networks. (Greg)
- stochastic: On-Chip Stochastic Communication. (Marghoob)
Reading assignment for 4/24:
- limitations: Limitations and Challenges of CAD. (Juliet)
- kirkpatrick: Optimization by Simulated Annealing. (Tim)
- pathfinder: Router for FPGAs. (Sameer)
- fpl97vpr: Packing, Placement and Routing for FPGAs. (Alex)
Reading assignment for 4/26:
- fm-partitioning: Linear-Time Heuristic for Network Patitions. (Shah)
- bluespec: Case study using the Bluespec HDL. (Terry)
- spice-history: Overview of three decades of SPICE.,
johannsen: Bristle Blocks: A Silicon Compiler. These 2 go together (Donald)
Lecture Notes in PDF:
- 1/16:
- Lecture 1: Introduction Part 1
- 1/18:
- Lecture 2: Introduction Part 2
- 1/23 & 1/25:
- Lecture 3: Power & Energy
- 2/6 & 2/8:
- Lecture 4: Introduction to Devices and Processing
- 2/20 & 2/22:
- Lecture 5: Introduction to System Implementation Alternatives
- 3/6:
- Lecture 6: Asynchronous Circuits (Self-timed Logic)
- 3/8:
- Lecture 7: Guest Speaker, Ivan Sutherland
- 3/20:
- Project Proposal Review
- 3/22:
- Lecture 8: CMOS Imagers, John Lazzaro
- 4/3:
- Lecture 9: On-Chip Networks - Part 1
- 4/5:
- Lecture 10: On-Chip Networks - Part 2
- 4/17:
- Lecture 11: Computer Aided Design - Part 1, Lecture 12: Computer Aided Design - Part 2
- 4/19:
- Lecture 13: Computer Aided Design - Part 3
- 5/1:
- Project Reports - Part 1
- 5/3:
- Project Reports - Part 2
- 5/8:
- Project Reports - Part 3
John Wawrzynek
26 Apr 2007
(johnw@cs.berkeley.edu)