Publications

• Embracing and Extending 20th-Century Instruction Set Architectures, Joe Gebis and David Patterson. IEEE Computer, Vol 40, Issue 4, April 2007, pages 68-75.
• The Landscape of Parallel Computing Research: A View from Berkeley, Krste Asanovic, Ras Bodik, Bryan Christopher Catanzaro, Joseph James Gebis, Parry Husbands, Kurt Keutzer, David A. Patterson, William Lester Plishker, John Shalf, Samuel Webb Williams and Katherine A. Yelick. University of California, Berkeley, Technical Report No. UCB/EECS-2006-183, December 18, 2006.
• VIRAM1: A Media-Oriented Vector Processor with Embedded DRAM, J. Gebis, S. William, C. Kozyrakis, D. Patterson. 41st Design Automation Student Design Contenst, San Diego, CA, June 2004.
• A 64-bit Partitionable Integer Multiplier for VIRAM1, Joseph Gebis. University of California, Berkeley, Master's Report and Technical Report No. UCB/CSD-03-1288, Nov. 2003.
• Kozyrakis C, Judd D, Gebis J, Williams S, Patterson D, Yelick K. Hardware/compiler codevelopment for an embedded media processor. Proceedings of the IEEE, vol.89, no.11, Nov. 2001, pp.1694-709. Publisher: IEEE, USA.
• Gebis J. Trends in merged DRAM-logic computing. SPIE-Int. Soc. Opt. Eng. Proceedings of Spie - the International Society for Optical Engineering, vol.4109, 2000, pp.198-205. USA.
• Vector IRAM: A Media-oriented Vector Processor with Embedded DRAM, C. Kozyrakis, J. Gebis, D. Martin, S. Williams, I. Mavroidis, S. Pope, D. Jones, D. Patterson, K. Yelick. 12th Hot Chips Conference, Palo Alto, CA, August 2000.

Presentations

• "VIRAM1: A Media-Oriented Vector Processor with Embedded DRAM", J. Gebis, S. William, C. Kozyrakis, D. Patterson. 41st Design Automation Student Design Contenst, San Diego, CA, June 2004.
• Gebis J. Trends in merged DRAM-logic computing. SPIE-Int. Soc. Opt. Eng. Proceedings of Spie - the International Society for Optical Engineering, 2000.
• "Iram State and Future Plans". 2000 IEEE Computer Elements Mesa Workshop. Wednesday Jan 19, 2000.