Eric Chin

Eric Chin
Graduate Student Researcher
Department of Electrical Engineering and Computer Sciences
University of California, Berkeley

Biography

Eric Chin was born in 1983 in Torrance, California. In 2005, he graduated from Cornell University with a Bachelors of Science in Electrical and Computer Engineering. Subsequently, he received a Masters of Science degree in Electrical Engineering and Computer Sciences from the University of California, Berkeley in 2007. He is now a third year graduate student researcher at UC Berkeley and is advised by Professor Andrew Neureuther.

Eric has held various internship positions at Sandcraft, Inc., Intel Corporation, Advanced Micro Devices, and Cadence Design Systems. His research interests include robust integrated circuit design, CAD synthesis flows, optical proximity correction, process variations, and design for manufacturing solutions.

Publications

E. Chin, J. Holwill, and A. Neureuther, "Prediction of Interconnect Delay Variations using Pattern Matching." SPIE Advanced Lithography, Proceedings of SPIE Vol 6521(21), San Jose, 2007.
A. Neureuther, W. Poppe, J. Holwill, E. Chin, L.T.-N Wang, J.-S. Yang, M. Miller, D. Ceperley, C. Clifford, K. Kikuchi, J. Choi, D. Dornfeld, P. Friedberg, C. Spanos, J. Hoang , J. Chang, J. Hsu, D. Graves, A. Wu , and M. Lieberman. "Collaborative Platform, Tool-Kit, and Physical Models for DfM." SPIE Advanced Lithography, Proceedings of SPIE Vol 6521(21), San Jose, 2007.