Biographical Sketch

Donald Chai hails from Brooklyn in New York City, meaning he properly pronounces phrases such as "orange", "Super Mario Brothers", and "forget about it". After being imbued with super EE and CS powers at Cornell University, he decided to take up surfing and somehow ended up in Berkeley, on the wrong end of California. There, he probed the deep mysteries of design automation under the watchful (and infinitely patient) eye of Andreas Kuehlmann, ultimately exultingly culminating in a PhD in December 2009.

Research interests:

• Constraint satisfaction and optimization
• Leakage power minimization
• Statistical timing
• Layout and timing optimization

Publications

• Z. Wei, D. Chai, A. R. Newton, and A. Kuehlmann, Fast Boolean Matching with Don't Cares, International Symposium on Quality Electronic Design, 2006.
• D. Chai and A. Kuehlmann, Building a Better Boolean Matcher and Symmetry Detector, Design Automation and Test in Europe, 2006.
• D. Chai and A. Kuehlmann, A Fast Pseudo-Boolean Constraint Solver, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 24(3), March 2005, pp. 305-317.
• D. Chai and A. Kuehlmann, Circuit-based Preprocessing of ILP and Its Applications in Leakage Minimization and Power Estimation, Interational Conference on Computer Design, 2004. (Best Paper Award)
• D. Chai and A. Kuehlmann, A Fast Pseudo-Boolean Constraint Solver, Design Automation Conference, 2003.
• D. Chai, A. Kondratyev, Y. Ran, K. Tseng, Y. Watanabe, and M. Marek-Sadowska, Temporofunctional Crosstalk Noise Analysis, Design Automation Conference, 2003.

My Erdös number is a whopping four.

Codes

• SWIG Wrappers for OpenAccess
• Galena Pseudo-Boolean Constraint Solver
• Boolean Matcher