Dai Bui, EE Graduate Student
U.C. Berkeley
EECS Department
205 Cory Hall #1772
Berkeley CA 94720-1772
I am a graduate student at UC Berkeley in Electrical Engineering & Computer Science department, my major is in computer aided design and minors in parallel computing and statistics. My interests are energy optimization of parallel computing systems, program synthesis and code generation with emphasis on streaming languages, verification of real-time parallel/distributed embedded systems, hardware/software co-design in multicore systems, communication for parallel computing, QoS of computer networking, human computer iteraction. My advisor is Prof. Edward A. Lee.
I graduated from Hanoi University of Technology in Electronics and Telecommunications and spent a few months as an internship student at University of Trento before coming to Berkeley.
I was also a visting researcher at THALES Research & Technology in France.
I spent the 2011 summer at Microsoft Research in Extreme Computing Group working on StreamIt code generation for the E2 dynamic core processor. Stay tuned for more updated information.
Research
Streaming language
Dynamic multi-dimensional synchronous dataflow model of computation for image processing/manipulation (in collaboration with THALES Research & Technology).
Circular dependency checking for distributed stream programs in the presence of both control (e.g. teleport messages) and data messages.
Statically scheduling of dynamic streaming applications.
Program transformation to optimize buffer size and data transfer between streaming processes.
Power optimization, program synthesis of streaming languages on multicore machines
Power optimization for streaming languages on multicore machines and network on chip by turning links off and DVFS.
StreamIt code generation and optimization for multicore machines (implemented a StreamIt backend for shared memory machines and E2).
Program synthesis, modular code generation for streaming applications.
Just-in-time compilation to speed up simulation of large simulation models.
Composable scheduling for parallel/distributed real-time systems
Composable and flexible real-time packet scheduling for network on-chip
Composability of real-time event processing
Human computer interaction
Computer vision - computer graphics interaction.
Physical prototyping with Ptolemy.
Berkeley class projects
Time Series Analysis and Prediction of Synchronous Dataflow Application Packet Timing Intervals on Multicore Machines.
Debugging Property Type Systems.
Probabilistic Model Checking of Packet Delay in Network on Chip.
On-time Network on Chip.
On-time Internet.
Parallelizing Boolean SAT-Solver on SMP machines.
Matrix tridiagonalization on NVIDIA GPU.
Evaluation of Parallelizing Hidden Markov Model on Smart Memories.
Stavros Tripakisi, Dai Bui, Marc Geilen, Bert Rodiers, Edward A. Lee, Compositionality in Synchronous Data Flow: Modular Code Generation from Hierarchical SDF Graphs. ACM Transactions on Embedded Computing Systems (to appear).
eecs.berkeley.edu