Chung-Wei Lin 林忠緯 E-mail: cwlin at eecs.berkeley.edu

2009--Present: Ph.D. Student, Department of Electrical Engineering and Computer Sciences, University of California at Berkeley

• Advisor: Alberto L. Sangiovanni-Vincentelli

2005--2007: M.S., Graduate Institute of Electronics Engineering, National Taiwan University

• Advisor: Yao-Wen Chang

2001--2005: B.S., Department of Computer Science and Information Engineering, National Taiwan University

ACM/IEEE Journal Papers:

1. C.-W. Lin, P.-W. Lee, Y.-W. Chang, C.-F. Shen, and W.-C. Tseng, "An efficient pre-assignment routing algorithm for flip-chip designs," accepted and to appear in IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems (TCAD).
2. C.-W. Lin, S.-L. Huang, K.-C. Hsu, M.-X. Lee, and Y.-W. Chang, "Multi-layer obstacle-avoiding rectilinear Steiner tree construction based on spanning graphs," in IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol. 27, No. 11, pp. 2007--2016, Nov. 2008.
3. C.-H. Liu, H.-Y. Liu, C.-W. Lin, S.-J. Chou, Y.-W. Chang, S.-Y. Kuo, S.-Y. Yuan, and Y.-W. Chen, "An efficient graph-based algorithm for ESD current path analysis," in IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol. 27, No. 8, pp. 1363--1375, Aug. 2008.
4. C.-W. Lin, S.-Y. Chen, C.-F. Li, Y.-W. Chang, and C.-L. Yang, "Obstacle-avoiding rectilinear Steiner tree construction based on spanning graphs," in IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol. 27, No. 4, pp. 643--653, Apr. 2008.

Major Conference Papers:

1. S.-L. Huang, C.-W. Lin, and Y.-W. Chang, "Efficient provably good OPC modeling and its applications to interconnect optimization," in Proceedings of IEEE International Conference on Computer Design (ICCD-2010), pp. 336--341, Amsterdam, Netherlands, Oct. 2010. (Acceptance Rate = 30%; Best Paper Award)
2. P.-W. Lee, C.-W. Lin, Y.-W. Chang, C.-F. Shen, and W.-C. Tseng, "An efficient pre-assignment routing algorithm for flip-chip designs," in Proceedings of IEEE/ACM International Conference on Computer-Aided Design (ICCAD-2009), pp. 239--244, San Jose, CA, Nov. 2009. (Acceptance Rate = 26%)
3. C.-W. Lin, S.-L. Huang, K.-C. Hsu, M.-X. Lee, and Y.-W. Chang, "Efficient multi-layer obstacle-avoiding rectilinear Steiner tree construction," in Proceedings of IEEE/ACM International Conference on Computer-Aided Design (ICCAD-2007), pp. 380--385, San Jose, CA, Nov. 2007. (Acceptance Rate = 27%)
4. C.-W. Lin, S.-Y. Chen, C.-F. Li, Y.-W. Chang, and C.-L. Yang, "Efficient obstacle-avoiding rectilinear Steiner tree construction," in Proceedings of ACM International Symposium on Physical Design (ISPD-2007), pp. 127--134, Austin, TX, Mar. 2007. (Acceptance Rate = 37%; Best Paper Nominee)
5. C.-W. Lin, M.-C. Tsai, K.-Y. Lee, T.-C. Chen, T.-C. Wang, and Y.-W. Chang, "Recent research and emerging challenges in physical design for manufacturability/reliability," in Proceedings of ACM/IEEE Asia South Pacific Design Automation Conference (ASP-DAC-2007), pp. 238--243, Yokohama, Japan, Jan. 2007. (Invited Paper)
6. H.-Y. Liu, C.-W. Lin, S.-J. Chou, W.-T. Tu, C.-H. Liu, Y.-W. Chang, and S.-Y. Kuo, "Current path analysis for electrostatic discharge protection," in Proceedings of IEEE/ACM International Conference on Computer-Aided Design (ICCAD-2006), pp. 510--515, San Jose, CA, Nov. 2006. (Acceptance Rate = 24%)

Other Conference Papers:

1. C.-W. Lin, M. Di Natale, H. Zeng, A. Sangiovanni-Vincentelli, "Performance analysis of synchronous models implementations on loosely time-triggered architectures," in Work-in-Progress Session of IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS-2011), Chicago, IL, Apr. 2011.
2. P.-W. Lee, C.-W. Lin, and Y.-W. Chang, "Fast pre-assignment flip-chip routing," in VLSI Design/CAD Symposium, Hua-Lien, Taiwan, Aug. 2009. (Best Paper Nominee; Selection was cancelled due to typhoon Morakot)
3. C.-W. Lin, Y.-C. Chen, and A.-C. Pang, "A new resource allocation scheme for IEEE 802.16-based networks," in IEEE VTS Asia Pacific Wireless Communications Symposium (APWCS-2006), Daejeon, Korea, Aug. 2006.

Thesis:

1. C.-W. Lin, "Efficient obstacle-avoiding rectilinear Steiner tree construction," Master's Thesis, National Taiwan University, Jun. 2007.

2009--Present (EECS, UC Berkeley): GPA = 4.00 / 4.00 (1 'A+' and 7 'A's), #Credits = 27, Rank = N/A
2005--2007 (GIEE, NTU): GPA = 4.00 / 4.00 (93.14 in 100-point scale), #Credits = 22+12, Rank = 3 (among 132 students)
2001--2005 (CSIE, NTU): GPA = 4.00 / 4.00 (92.02 in 100-point scale), #Credits = 169, Rank = 2 (among 108 students)

EECS Department Fellowship, EECS, UC Berkeley, 2009.08
The Best M.S. Thesis Award, GIEE, NTU, 2007.12
The 1st Prize, Youth Thesis Award, Chinese Institute of Electrical Engineering, 2007.12
The 1st Prize, IC/CAD Contest, Ministry of Education, Taiwan, 2007.07
Member of Phi-Tau-Phi Scholastic Honor Society (Top 3% Students), 2007.06
Two-Time EDA Scholarship, SpringSoft Education Foundation, 2007.07, 2006.07
Incentia Scholarship (Rank 1st in Program Entrance Competition of EDA Group), 2005.09
Member of Phi-Tau-Phi Scholastic Honor Society (Top 1% Students), 2005.06
Two-Time Champion, Tennis Team Competition, National College Games, 2006.04, 2004.03
Six-Time Presidential Award (Top 5% Students), NTU, 2005.04, 2004.10, 2004.04, 2003.04, 2002.10, 2002.04

Summer Intern, General Motors, 2011.05--2011.08
Research Assistant, Synopsys Taiwan, 2009.02--2009.07
Research Assistant, NTU, 2009.02--2009.07
Military Instructor in Information System (Second Lieutenant), R.O.C. Army, 2007.11--2008.06
Compulsory Military Service, R.O.C. Army, 2007.07--2008.06
Research Assistant, Taiwan Semiconductor Manufacturing Company, 2006.05--2007.06
Teaching Assistant, Nonlinear Programming, NTU, 2007.02--2007.06
Teaching Assistant, Logic Synthesis and Verification, NTU, 2006.09--2007.01

Member of NTU Tennis Team, 2002.09--2007.06
Chairman of NTU EECS College Students Association, 2003.07--2004.06

Yao-Wen Chang (ywchang at cc.ee.ntu.edu.tw), Professor, Department of Electrical Engineering and Graduate Institute of Electronics Engineering, NTU
Ai-Chun Pang (acpang at csie.ntu.edu.tw), Associate Professor, Department of Computer Science and Information Engineering, NTU
Jie-Hong Roland Jiang (jhjiang at cc.ee.ntu.edu.tw), Associate Professor, Department of Electrical Engineering and Graduate Institute of Electronics Engineering, NTU