Research

I believe that modern digital designers must have broad knowledge of the entire design stack, from devices to software. My research interests include low-power VLSI design and fine-grained dynamic frequency and voltage scaling for energy-efficient processors.

I am part of the Raven project team. We are designing energy-efficient multicore processors with fine-grained DVFS. Here is a brief summary of the project for a general audience. We taped out a chip in 28nm FD-SOI in September 2013.

At NVIDIA, I have been thinking about asynchronous boundary crossings. More details to follow, pending a patent and publication.

I helped write RTL for a combined LDPC/Turbo decoder that implements the 802.11ac and LTE Advanced standards.

I worked with Martin Maas to implement a coprocessor for garbage collection in managed languages.

I worked on VLSI design for DREAMER, an efficient fabric for digital hardware emulation.

I helped to design an LPDDR2 memory controller.

I am a user and proponent of tools for open-source hardware design such as RISC-V, an open ISA, and Chisel, a new hardware description language.

Teaching

In Fall 2013, I was the GSI for Computer Science 250, VLSI Systems Design. I redesigned the course labs to better align the course with the ASPIRE hardware vision.

I am the fearless leader of Electrical Engineering Outreach @ Berkeley. We orchestrate science demos for students at underserved Bay Area schools. Contact me if you're interested in getting involved or in a visit to your classroom.

I taught two years of Algebra II at Cesar Chavez High School in Washington, DC.

Miscellany

I grew up in New England and studied engineering at Harvey Mudd College, a small, highly-rated technical school in Southern California (I was advised by David Money Harris). I enjoy hiking, politics, and board games that are too long.

Most of my salary is paid by the federal government . Thanks, American readers, for your support.

This site was last updated 9/14.