In preparation
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Books
In preparation
Book chapters
| Balarin, F., Hsieh, H., Lavagno, L., Passerone, C., Pinto, A., Sangiovanni-Vincentelli, A., Watanabe, Y. & Yang, G. (2004), "Metropolis: a Design Environment for Heterogeneous Systems" Morgan Kaufmann. |
BibTeX:
@inbook{balaring_metropolis_2004,
author = {F. Balarin and H. Hsieh and L. Lavagno and C. Passerone and A. Pinto and A. Sangiovanni-Vincentelli and Y. Watanabe and G. Yang},
title = {Metropolis: a Design Environment for Heterogeneous Systems},
publisher = {Morgan Kaufmann},
year = {2004}
}
|
Journal papers
| Pinto, A., Carloni, L.P. & Vincentelli, A.L.S. (2008), "A Methodology for Constraint-Driven Synthesis of On-Chip Communications", Accepted for publication, IEEE Transactions on Computer Aided Design. |
| Abstract: We present a methodology and an optimization framework for the synthesis of on-chip communication (OCC) by assembling components such as interfaces, routers, buses and links, from a target library. Models for functionality, cost, and performance of each element are captured in the library together with their composition rules. The methodology for the design of OCC is based on: -a mathematical framework to model communication at different levels of abstraction from the point-to-point input specification to the library elements and the final implementation; -the formulation of an optimization problem and a heuristic synthesis algorithms to solve it: given a set of communication requirements on the throughput and latency of the channels it returns a communication implementation that satisfies them while minimizing power consumption. |
BibTeX:
@article{4_apint_tcad_noc_08,
author = {Alessandro Pinto and Luca P. Carloni and Alberto L. Sangiovanni Vincentelli},
title = {A Methodology for Constraint-Driven Synthesis of On-Chip Communications},
journal = {Submitted to IEEE Transactions on Computer Aided Design},
year = {2008}
}
|
| Pinto, A., Carloni, L.P. & Vincentelli, A.L.S. (2008), "COSI: A Framework for the Design of Interconnection Networks", IEEE Desing and Test of Computers, Vol. 25, No. 5, September/October 2008. |
| Abstract: The COmmunication Synthesis Infrastructure (COSI) framework, a public-domain design framework for the design exploration and synthesis of interconnection networks, is presented. The framework embodies a methodology based on the platform-based design principles. It is used to define specific interconnect design flows for a variety of applications from chips to systems. On-chip communication design is used in this paper as an example of how to use COSI for a specific application. |
BibTeX:
@article{5_apinto_dnt_noc_08,
author = {Alessandro Pinto and Luca P. Carloni and Alberto L. Sangiovanni Vincentelli},
title = {COSI: A Framework for the Design of Interconnection Networks},
journal = {IEEE Desing and Test of Computers},
volume={25},
number={5},
year = {2008}
}
|
| Carloni, L.P., Passerone, R., Pinto, A. & Angiovanni-Vincentelli, A.L. (2006), "Languages and tools for hybrid systems design", Found. Trends Electron. Des. Autom.. Hanover, MA, USA Vol. 1(1/2), pp. 1-193. Now Publishers Inc.. |
| Abstract: The explosive growth of embedded electronics is bringing information and control systems of increasing complexity to every aspects of our lives. The most challenging designs are safety-critical systems, such as transportation systems (e.g., airplanes, cars, and trains), industrial plants and health care monitoring. The difficulties reside in accommodating constraints both on functionality and implementation. The correct behavior must be guaranteed under diverse states of the environment and potential failures; implementation has to meet cost, size, and power consumption requirements. The design is therefore sub ject to extensive mathematical analysis and simulation. However, traditional models of information systems do not interface well to the continuous evolving nature of the environment in which these devices operate. Thus, in practice, different mathematical representations have to be mixed to analyze the overall behavior of the system. Hybrid systems are a particular class of mixed models that focus on the combination of discrete and continuous subsystems. There is a wealth of tools and languages that have been proposed over the years to handle hybrid systems. However, each tool makes different assumptions on the environment, resulting in somewhat different notions of hybrid system. This makes it difficult to share information among tools. Thus, the community cannot maximally leverage the substantial amount of work that has been directed to this important topic. In this paper, we review and compare hybrid system tools by highlighting their differences in terms of their underlying semantics, expressive power and mathematical mechanisms. We conclude our review with a comparative summary, which suggests the need for a unifying approach to hybrid systems design. As a step in this direction, we make the case for a semantic-aware interchange format, which would enable the use of joint techniques, make a formal comparison between different approaches possible, and facilitate exporting and importing design representations. |
BibTeX:
@article{3_fandt_hybrid_06,
author = {Luca P. Carloni and Roberto Passerone and Alessandro Pinto and Alberto L. Angiovanni-Vincentelli},
title = {Languages and tools for hybrid systems design},
journal = {Found. Trends Electron. Des. Autom.},
publisher = {Now Publishers Inc.},
year = {2006},
volume = {1},
number = {1/2},
pages = {1--193},
doi = {http://dx.doi.org/10.1561/1000000001}
}
|
| Pinto, A., Bonivento, A., Sangiovanni-Vincentelli, A.L., Passerone, R. & Sgroi, M. (2006), "System level design paradigms: Platform-based design and communication synthesis", ACM Trans. Des. Autom. Electron. Syst.. New York, NY, USA Vol. 11(3), pp. 537-563. ACM. |
| Abstract: Embedded system level design must be based on paradigms that make formal foundations and unification a cornerstone of their construction. Platform-Based designs and communication synthesis are important components of the paradigm shift we advocate. Communication synthesis is a fundamental productivity tool in a design methodology where reuse is enforced. Communication design in a reuse methodology starts with a set of functional requirements and constraints on the interaction among components and then proceeds to build protocols, topology, and physical implementations that satisfy requirements and constraints while optimizing appropriate measures of efficiency of the implementation. Maximum efficiency can be reached when the communication specifications are entered at high levels of abstraction and the design process optimizes the implementation from this specification. Unfortunately, this process is very difficult if it is not cast in a rigorous framework. Platform-Based design helps define a successive refinement process where each step can be carried out automatically and optimized appropriately. We present two cases, an on-chip and a wireless sensor network design, where the resulting methodology gave encouraging results. |
BibTeX:
@article{2_apinto_toaes_pbd_06,
author = {Alessandro Pinto and Alvise Bonivento and Allberto L. Sangiovanni-Vincentelli and Roberto Passerone and Marco Sgroi},
title = {System level design paradigms: Platform-based design and communication synthesis},
journal = {ACM Trans. Des. Autom. Electron. Syst.},
publisher = {ACM},
year = {2006},
volume = {11},
number = {3},
pages = {537--563},
doi = {http://doi.acm.org/10.1145/1142980.1142982}
}
|
| Sangiovanni-Vincentelli, A.L. & Pinto, A. (2005), "An overview of embedded system design education at berkeley", Trans. on Embedded Computing Sys.. New York, NY, USA Vol. 4(3), pp. 472-499. ACM. |
| Abstract: Embedded systems have been a traditional area of strength in the research agenda of the University of California at Berkeley. In parallel to this effort, a pattern of graduate and undergraduate classes has emerged that is the result of a distillation process of the research results. In this paper, we present the considerations that are driving our curriculum development and we review our undergraduate and graduate program. In particular, we describe in detail a graduate class (EECS249: Design of Embedded Systems: Modeling, Validation and Synthesis) that has been taught for six years. A common feature of our education agenda is the search for fundamentals of embedded system science rather than embedded system design techniques, an approach that today is rather unique. |
BibTeX:
@article{1_asv_tecs_education_05,
author = {Alberto L. Sangiovanni-Vincentelli and Alessandro Pinto},
title = {An overview of embedded system design education at berkeley},
journal = {Trans. on Embedded Computing Sys.},
publisher = {ACM},
year = {2005},
volume = {4},
number = {3},
pages = {472--499},
doi = {http://doi.acm.org/10.1145/1086519.1086521}
}
|
Conference papers
| Francesco Leonardi, Alessandro Pinto, Luca Carloni "A Case-Study in Distributed Deployment of Embedded Software for Camera Networks", DATE 2009, Nice, France, April 2009. |
| Abstract: We present an embedded software application for the real-time estimation of building occupancy using a network of video cameras. We analyze a series of alternative decompositions of the main tasks of our application and profile each of them by running the corresponding embedded software on three different processors. Based on the profiling measures, we build various alternative embedded platforms by combining different embedded processors, memory modules and network interfaces. In particular, we consider the choice of two possible network technologies: ARCnet and Ethernet. After deriving an analytical model of the network costs, we use it to complete an exploration of the design space as we scale the number of video cameras in an hypothetical building. Finally, we compare our results with those obtained for two specific real buildings of different characteristics. We conclude discussing the results of our case study in the broader context of other camera-network applications. |
BibTeX:
@inproceedings{LeonardiCameras2009,
author = {Francesco Leonardi and Alessandro Pinto and Luca Carloni},
title = {A Case-Study in Distributed Deployment of Embedded Software for Camera Networks},
booktitle = {},
year = {2009},
url = {}
}
|
| Massimiliano D'Angelo, Carlo Fischione, Matteo Butussi, Alessandro Pinto, Alberto Sangiovanni Vincentelli, "Outage-Based Rate Maximization in CDMA Wireless Networks", In Proceedings of IEEE Global Telecommunications Conference 2008, New Orleans, LA, December 2008. |
| Abstract: The problem of maximizing the sum of the transmit rates while limiting the outage probability below an appropriate threshold is investigated for networks where the nodes have limited processing capabilities. We focus on CDMA wireless network whose rates are characterized under mixed Rayleigh-lognormal fading. The outage probability is given implicitly by a complex function so that solving the optimization problem requires substantial computing. In this paper, we propose a novel explicit approximation of this function that allows solving the problem in an affordable manner. We propose two solutions of the maximization problem with the simplified outage probability constraint: one solves the problem using mixed integer-real programming. The other relaxes the constraints that rates be integers yielding a standard convex programming optimization that can be solved much faster. Numerical results show that our approaches perform well for average values of the outage requirements. |
BibTeX:
@inproceedings{DangeloOutageBased2008,
author = {Massimiliano D'Angelo and Carlo Fischione and Matteo Butussi and Alessandro Pinto and Alberto Sangiovanni Vincentelli},
title = {Outage-Based Rate Maximization in CDMA Wireless Networks},
booktitle = {Proceedings of IEEE Global Telecommunications Conference 2008, New Orleans, LA},
year = {2008},
url = {}
}
|
| Pinto, A., D'Angelo, M., Fischione, C., Scholte, E. & Sangiovanni-Vincentelli, A. (2008), "Synthesis of Embedded Networks for Building Automation and Control", In Proc. of American Control Conference (ACC 08), Seattle, Washington,., June, 2008. |
| Abstract: We present a methodology and a software framework for the automatic design exploration of the communication network among sensors, actuators and controllers in building automation systems. Given 1) a set of end-to-end latency, throughput and packet error rate constraints between nodes, 2) the building geometry, and 3) a library of communication components together with their performance and cost characterization, a synthesis algorithm produces a network implementation that satisfies all end-to-end constraints and that is optimal with respect to installation and maintenance cost. The methodology is applied to the synthesis of wireless networks for an essential step in any control algorithm in a distributed environment: the estimation of control variables such as temperature and air-flow in buildings. |
BibTeX:
@inproceedings{PintoDAngeloFischioneScholteSangiovanniVincentelli08_SynthesisOfEmbeddedNetworksForBuildingAutomationControl,
author = {Alessandro Pinto and Massimiliano D'Angelo and Carlo Fischione and Eelco Scholte and Alberto Sangiovanni-Vincentelli},
title = {Synthesis of Embedded Networks for Building Automation and Control},
booktitle = {Proc. of American Control Conference (ACC 08), Seattle, Washington,},
year = {2008},
url = {http://chess.eecs.berkeley.edu/pubs/467.html}
}
|
| Carloni, L., Kahng, A., Muddu, S., Pinto, A., Samadi, K. & Sharma, P. (2008), "Interconnect Modeling for Improved System-Level Design Optimization", In Asia and South Pacific Design Automation Conference., January, 2008. |
| Abstract: Accurate modeling of delay, power, and area of interconnections early in the design phase is crucial for effective system-level optimization. Models presently used in system-level optimizations, such as network-on-chip (NoC) synthesis, are inaccurate in the presence of deep-submicron effects. In this paper, we propose new, highly accurate models for delay and power in buffered interconnects; these models are usable by system-level designers for existing and future technologies. We present a general and transferable methodology to construct our models from a wide variety of reliable sources (Liberty, LEF/ITF, ITRS, PTM, etc.). The modeling infrastructure, and a number of characterized technologies, are available as open source. Our models comprehend key interconnect circuit and layout design styles, and a power-efficient buffering technique that overcomes unrealities of previous delay-driven buffering techniques. We show that our models are significantly more accurate than previous models for global and intermediate buffered interconnects in 90 nm and 65 nm foundry processes - essentially matching signoff analyses. We also integrate our models in the COSI-OCC synthesis tool and show that the more accurate modeling significantly affects optimal/achievable architectures that are synthesized by the tool. The increased accuracy provided by our models enables system-level designers to obtain better assessments of the achievable performance/power/area tradeoffs for (communication-centric aspects of) system design, with negligible setup and overhead burdens. |
BibTeX:
@inproceedings{CarloniKahngMudduPintoSamadiSharma08,
author = {Luca Carloni and Andrew Kahng and Swamy Muddu and Alessandro Pinto and Kambiz Samadi and Puneet Sharma},
title = {Interconnect Modeling for Improved System-Level Design Optimization},
booktitle = {Asia and South Pacific Design Automation Conference},
year = {2008},
url = {http://www.gigascale.org/pubs/1170.html}
}
|
| Pinto, A., Carloni, L. & Sangiovanni-Vincentelli, A. (2007), "A Communication Synthesis Infrastructure for Heterogeneous Networked Control Systems and Its Application to Building Automation and Control", In Proceedings of the Seventh International Conference on Embedded Software (EMSOFT), 2007.., October, 2007. |
| Abstract: In networked control systems the controller of a physically distributed plant is implemented as a collection of tightly interacting, concurrent processes running on a distributed execution platform. The execution platform consists of a set of heterogeneous components (sensors, actuators, and controllers) that interact through a hierarchical communication network. We propose a methodology and a framework for design exploration and automatic synthesis of the communication network. We present how our approach can be applied to the design of control systems for intelligent buildings. The input specification of the control system includes (i) the constraints on the location of its components, which are imposed by the plant, (ii) the communication requirements among the components, and (iii) an estimation of the real-time constraints for the correct behavior of the algorithms implementing the control law. The output produces an implementation of the control networks that is obtained by combining elements from a pre-defined library of communication links, protocols, interfaces, and switches. The implementation is optimal in the sense that it satisfies the given specification while minimizing an objective function that captures the overall cost of the network implementation. |
BibTeX:
@inproceedings{PintoCarloniSangiovanniVincentelli07,
author = {Alessandro Pinto and Luca Carloni and Alberto Sangiovanni-Vincentelli},
title = {A Communication Synthesis Infrastructure for Heterogeneous Networked Control Systems and Its Application to Building Automation and Control},
booktitle = {Proceedings of the Seventh International Conference on Embedded Software (EMSOFT), 2007.},
year = {2007},
url = {http://www.gigascale.org/pubs/1037.html}
}
|
| Davare, A., Densmore, D., Meyerowitz, T., Pinto, A., Sangiovanni-Vincentelli, A., Yang, G., Zeng, H. & Zhu, Q. (2007), "A Next-Generation Design Framework for Platform-Based Design", In Conference on Using Hardware Design and Verification Languages (DVCon)., February, 2007. |
| Abstract: The platform-based design methodology is based on the usage of formal modeling techniques, clearly defined abstraction levels and the separation of concerns to enable an effective design process. The METROPOLIS framework embodies the platform-based design methodology and has been applied to a number of case studies across multiple domains. Based on these experiences, we have identified three key features that need to be enhanced: heterogeneous IP import, orthogonalization of performance from behavior, and design space exploration. The next generation METRO II framework incorporates these advanced features. The main concepts underlying METRO II are described in this paper and illustrated with a small example. |
BibTeX:
@inproceedings{DavareDensmoreMeyerowitzPintoSangiovanniVincentelli07,
author = {Abhijit Davare and Douglas Densmore and Trevor Meyerowitz and Alessandro Pinto and Alberto Sangiovanni-Vincentelli and Guang Yang and Haibo Zeng and Qi Zhu},
title = {A Next-Generation Design Framework for Platform-Based Design},
booktitle = {Conference on Using Hardware Design and Verification Languages (DVCon)},
year = {2007},
url = {http://www.gigascale.org/pubs/993.html}
}
|
| Alessandro Pinto, Luca Carloni, R.P.A.S. (2006), "Interchange Semantics for Hybrid System Models", 5th International Conference on Mathematical Modeling, Vienna, Austria , 2006. |
| Abstract: We propose an interchange format for hybrid systems to allow tool interoperability and seamless exchange of information among the hybrid system research community. The need of an interchange format is clear as the tools that have been developed so far use different modeling assumptions and semantics. In our approach, we focus on the semantics of the interchange format as we believe that only using a well-defined semantics will allow developing translation mechanisms from one tool to another that have guaranteed correctness properties. A unique, precise model of computation would make it impossible to support a variety of models that can be radically different. Hence, we use an “abstract semantics” in the sense that it can be refined to yield any model of computation, or “concrete semantics”, which, in turn, is associated to the existing languages that are used to specify hybrid systems. We show how leveraging its abstract semantics, the interchange format can be used to capture the essential information across different modeling approaches and how such information can be effectively used in the translation process. |
BibTeX:
@article{pinto_mathmod_06,
author = {Alessandro Pinto, Luca Carloni, Roberto Passerone, Alberto Sangiovanni-Vincentelli},
title = {Interchange Semantics for Hybrid System Models},
journal = {5th International Conference on Mathematical Modeling, Vienna, Austria , 2006},
year = {2006}
}
|
| Pinto, A., Carloni, L.P., Passerone, R. & Sangiovanni-Vincentelli, A.L. (2006), "Interchange Format for Hybrid Systems: Abstract Semantics", In HSCC. , pp. 491-506. |
| Abstract: In~teDBLP:conf/hybrid/PintoSCP05 we advocated the need for an interchange format for hybrid systems that enables the integration of design tools coming from many different research communities. In deriving such interchange format the main challenge is to define a language that, while presenting a particular formal semantics, remains general enough to accommodate the translation across the various modeling approaches used in the existing tools. In this paper we give a formal definition of the syntax and semantics for the proposed interchange format. In doing so, we clearly separate the structure of a hybrid system from the semantics attached to it. The semantics can be considered an “abstract semantics” in the sense that it can be refined to yield the model of computation, or “concrete semantics”, which, in turn, is associated to the existing languages that are used to specify hybrid systems. We show how the interchange format can be used to capture the essential information across different modeling approaches and how such information can be used in the translation process. |
BibTeX:
@inproceedings{DBLP:conf/hybrid/PintoCPS06,
author = {Alessandro Pinto and Luca P. Carloni and Roberto Passerone and Alberto L. Sangiovanni-Vincentelli},
title = {Interchange Format for Hybrid Systems: Abstract Semantics},
booktitle = {Proceedings of Hybrid Systems: Computation and Control, 9th International Workshop, Santa Barbara, CA, USA},
year = {2006},
pages = {491-506}
}
|
| Sprinkle, J., Ames, A., Pinto, A., Zheng, H. & Sastry, S. (2005), "On the Partitioning of Syntax and Semantics For Hybrid Systems Tools", In Proc. and 2005 European Control Conference Decision and Control CDC-ECC '05. 44th IEEE Conference on. , pp. 4694-4699. |
| Abstract: Interchange formats are notoriously difficult to finish. That is, once one is developed, it is highly nontrivial to prove (or disprove) generality, and difficult at best to gain acceptance from all major players in the application domain. This paper addresses such a problem for hybrid systems, but not from the perspective of a tool interchange format, but rather that of tool availability in a toolbox. Through the paper we explain why we think this is a good approach for hybrid systems, and we also analyze the domain of hybrid systems to discern the semantic partitions that can be formed to yield a classification of tools based on their semantics. These discoveries give us the foundation upon which to build semantic capabilities, and to guarantee operational interaction between tools based on matched operational semantics. |
BibTeX:
@inproceedings{Sprinkle2005,
author = {Sprinkle, J. and Ames, A.D. and Pinto, A. and Zheng, Haiyang and Sastry, S.S.},
title = {On the Partitioning of Syntax and Semantics For Hybrid Systems Tools},
booktitle = {Proc. and 2005 European Control Conference Decision and Control CDC-ECC '05. 44th IEEE Conference on},
year = {2005},
pages = {4694--4699}
}
|
| Sangiovanni-Vincentelli, A.L. & Pinto, A. (2005), "Embedded system education: a new paradigm for engineering schools?", SIGBED Rev.. New York, NY, USA Vol. 2(4), pp. 5-14. ACM. |
BibTeX:
@article{1121815,
author = {Alberto Luigi Sangiovanni-Vincentelli and Alessandro Pinto},
title = {Embedded system education: a new paradigm for engineering schools?},
journal = {SIGBED Rev.},
publisher = {ACM},
year = {2005},
volume = {2},
number = {4},
pages = {5--14},
doi = {http://doi.acm.org/10.1145/1121812.1121815}
}
|
| Balarin, F., Passerone, R., Pinto, A. & Sangiovanni-Vincentelli, A. (2005), "A formal approach to system level design: metamodels and unified design environments", In Proc. Third ACM and IEEE International Conference on Formal Methods and Models for Co-Design MEMOCODE '05. , pp. 155-163. |
| Abstract: The debate about efficient methods for hardware-software co-design has taken interesting turns over the years. In this paper, we argue that the essential problems to solve are prior to the decision on how to partition the system in hardware-software. We present a formal platform-based design method we have proposed over the years and a design environment, Metropolis, supporting the methodology, which starts by capturing the design specifications at the highest level of abstraction and then proceed toward an efficient implementation by subsequent refinement steps. We present the modeling strategy used in Metropolis based on formal semantics that is general enough to support the models of computation proposed so far and that facilitates the creation of new ones. Nonfunctional and declarative constraints can also be captured using a logic language. |
BibTeX:
@inproceedings{Balarin2005,
author = {Balarin, F. and Passerone, R. and Pinto, A. and Sangiovanni-Vincentelli, A.L.},
title = {A formal approach to system level design: metamodels and unified design environments},
booktitle = {Proc. Third ACM and IEEE International Conference on Formal Methods and Models for Co-Design MEMOCODE '05},
year = {2005},
pages = {155--163},
doi = {http://dx.doi.org/10.1109/MEMCOD.2005.1487909}
}
|
| Pinto, A., Sangiovanni-Vincentelli, A.L., Carloni, L.P. & Passerone, R. (2005), "Interchange Formats for Hybrid Systems: Review and Proposal", In HSCC. , pp. 526-541. |
| Abstract: Interchange formats have been the backbone of the EDA industry for several years. They are used as a way of helping the development of design flows that integrate foreign tools using formats with different syntax and, more importantly, different semantics. The need for integrating tools coming from different communities is even more severe for hybrid systems because of the relative immaturity of the field and the intrinsic difficulty of the mathematical underpinnings. In this paper, we provide a discussion about interchange formats for hybrid systems, we survey the approaches used by different tools for analysis (simulation and formal verification) and synthesis of hybrid systems, and we give a recommendation for an interchange format for hybrid systems based on the Metropolis metamodel. The proposed interchange format has rigorous semantics and can accommodate the translation to and from the formats of the tools we have surveyed while providing a formal reasoning framework. |
BibTeX:
@inproceedings{DBLP:conf/hybrid/PintoSCP05,
author = {Alessandro Pinto and Alberto L. Sangiovanni-Vincentelli and Luca P. Carloni and Roberto Passerone},
title = {Interchange Formats for Hybrid Systems: Review and Proposal},
booktitle = {Proceedings of Hybrid Systems: Computation and Control, 8th International Workshop, Zurich, Switzerland},
year = {2005},
pages = {526-541}
}
|
| Pinto, A., Carloni, L. & Sangiovanni-Vincentelli, A. (2003), "Efficient synthesis of networks on chip", In Proc. 21st International Conference on Computer Design. , pp. 146-150. |
| Abstract: We propose an efficient heuristic for the constraint-driven communication synthesis (CDCS) of on-chip communication networks. The complexity of the synthesis problems comes from the number of constraints that have to be considered. In this paper we propose to cluster constraints to reduce the number that needs to be considered by the optimization algorithm. Then a quadratic programming approach is used to solve the communication synthesis problem with the clustered constraints. We provide an analytical model that justifies our choice of the clustering cost function and we discuss a set of experiments showing the effectiveness of the overall approach with respect to the exact algorithm. |
BibTeX:
@inproceedings{Pinto2003b,
author = {Pinto, A. and Carloni, L.P. and Sangiovanni-Vincentelli, A.L.},
title = {Efficient synthesis of networks on chip},
booktitle = {Proc. 21st International Conference on Computer Design},
year = {2003},
pages = {146--150},
doi = {http://dx.doi.org/10.1109/ICCD.2003.1240887}
}
|
| Pinto, A., Carloni, L. & Sangiovanni-Vincentelli, A. (2002), "Constraint-driven communication synthesis", In Proc. 39th Design Automation Conference. , pp. 783-788. |
| Abstract: Constraint-driven communication synthesis enables the automatic design of the communication architecture of a complex system from a library of pre-defined intellectual property (IP) components. The key communication parameters that govern all the point-to-point interactions among system modules are captured as a set of arc constraints in the communication constraint graph. Similarly, the communication features offered by each of the components available in the IP communication library are captured as a set of feature resources together with its cost figures. Then, every communication architecture that can be built using the available components while satisfying all constraints is implicitly considered (as an implementation graph matching the constraint graph) to derive the optimum design solution with respect to the desired cost figure. The corresponding constrained optimization problem is efficiently solved by a novel algorithm that is presented here together with its rigorous theoretical foundations |
BibTeX:
@inproceedings{Pinto2002a,
author = {Pinto, A. and Carloni, L.R. and Sangiovanni-Vincentelli, A.L.},
title = {Constraint-driven communication synthesis},
booktitle = {Proc. 39th Design Automation Conference},
year = {2002},
pages = {783--788},
doi = {http://dx.doi.org/10.1109/DAC.2002.1012729}
}
|
Techical reports
| Pinto, A., Carloni, L. & Sangiovanni-Vincentelli, A.L. (2008), "COSI: A Public-Domain Design Framework for the Design of Interconnection Networks", Mar, 2008. (UCB/EECS-2008-22) |
| Abstract: The COmmunication Synthesis Infrastructure (COSI), a public-domain design framework for the design exploration and synthesis of interconnection networks, is presented. The framework embodies a methodology based on the platform-based design principles and is used to define specific design flows for a variety of applications. In this paper, we focus on a design flow for on-chip interconnect design. |
BibTeX:
@techreport{Pinto:EECS-2008-22,
author = {Pinto, Alessandro and Carloni, Luca and Sangiovanni-Vincentelli, Alberto L.},
title = {COSI: A Public-Domain Design Framework for the Design of Interconnection Networks},
year = {2008},
number = {UCB/EECS-2008-22},
url = {http://www.eecs.berkeley.edu/Pubs/TechRpts/2008/EECS-2008-22.html}
}
|
| Pinto, A., Sangiovanni-Vincentelli, A.L. & Carloni, L. (2007), "A Methodology and an Open Software Infrastructure for Constraint-Driven Synthesis of On-Chip Communications", Nov, 2007. (UCB/EECS-2007-130) |
| Abstract: An SoC is modeled as a set of pre-designed cores characterized by their area and interfaces and a set of end-to-end communication requirements on the channels connecting them. These requirements are the input specification to a synthesis process that produces an on-chip communication (OCC) by assembling components such as interfaces, routers, buses and links, from a target library. Models for functionality, cost, and performance of each element are captured in the library together with their composition rules. Our contributions is two pronged: 1) A methodology for the design of OCC based on: -a mathematical framework to model communication at different levels of abstraction from the point-to-point input specification to the library elements and the final implementation; -the formulation of an optimization problem and a heuristic synthesis algorithms to solve it: given a set of communication requirements on the throughput and latency of the channels it returns a communication implementation that satisfies them while minimizing power consumption. 2) A publicly available software package that includes alternative synthesis algorithms, various communication libraries, supporting tools for simulation and visualization, and a collection of SoC benchmarks. |
BibTeX:
@techreport{Pinto:EECS-2007-130,
author = {Pinto, Alessandro and Sangiovanni-Vincentelli, Alberto L. and Carloni, Luca},
title = {A Methodology and an Open Software Infrastructure for Constraint-Driven Synthesis of On-Chip Communications},
year = {2007},
number = {UCB/EECS-2007-130},
url = {http://www.eecs.berkeley.edu/Pubs/TechRpts/2007/EECS-2007-130.html}
}
|
| Pinto, A., Carloni, L. & Sangiovanni-Vincentelli, A.L. (2006), "Synthesis of On-Chip Interconnection Structures: From Point-To-Point Links to Networks-on-Chip", Nov, 2006. (UCB/EECS-2006-147) |
| Abstract: Packet-switched networks-on-chip (NOC) have been advocated as the solution to the challenge of organizing efficient and reliable communication structures among the components of a system-on-chip (SOC). A critical issue in designing a NOC is to determine its topology given the set of point-to-point communication requirements among these components. We present a novel approach to on-chip communication synthesis that is based on the iterative combination of two efficient computational steps: (1) an application of the k-Median algorithm to coarsely determine the global communication structure (which may turned out not be a network after all), and a (2) a variation of the shortest-path algorithm in order to finely tune the data flows on the communication channels. The application of our method to case studies taken from the literature shows that we can automatically synthesize optimal NOC topologies for multi-core on-chip processors and it offers new insights on why NOC are not necessarily a value proposition for some classes of application-specific SOCs. |
BibTeX:
@techreport{Pinto:EECS-2006-147,
author = {Alessandro Pinto and Luca Carloni and Alberto L. Sangiovanni-Vincentelli},
title = {Synthesis of On-Chip Interconnection Structures: From Point-To-Point Links to Networks-on-Chip},
year = {2006},
number = {UCB/EECS-2006-147},
url = {http://www.eecs.berkeley.edu/Pubs/TechRpts/2006/EECS-2006-147.html}
}
|
| Pinto, A., Carloni, L. & Sangiovanni-Vincentelli, A.L. (2006), "Synthesis of Low Power NOC Topologies under Bandwidth Constraints", Oct, 2006. (UCB/EECS-2006-137) |
BibTeX:
@techreport{Pinto:EECS-2006-137,
author = {Alessandro Pinto and Luca Carloni and Alberto L. Sangiovanni-Vincentelli},
title = {Synthesis of Low Power NOC Topologies under Bandwidth Constraints},
year = {2006},
number = {UCB/EECS-2006-137},
url = {http://www.eecs.berkeley.edu/Pubs/TechRpts/2006/EECS-2006-137.html}
}
|
| Pinto, A. (2003), "Synthesis of On-Chip Networks" Electronics Research Laboratory, June, 2003. (UCB/ERL M03/19) |
BibTeX:
@techreport{Pinto2003,
author = {Alessandro Pinto},
title = {Synthesis of On-Chip Networks},
year = {2003},
number = {UCB/ERL M03/19}
}
|
| Pinto, A. (2004), "Metropolis Design Guidelines" (UCB/ERL M04/40) |
BibTeX:
@techreport{Pinto2004,
author = {A. Pinto},
title = {Metropolis Design Guidelines},
year = {2004},
number = {UCB/ERL M04/40},
url = {http://www.eecs.berkeley.edu/Pubs/TechRpts/2004/4261.html}
}
|
Copyright © 2008 Alessandro Pinto