Amik Singh

I am first year graduate student in Computer Science at UC Berkeley. I am currently advised by Prof. James Demmel and I sit in ParLab.

My research interests include Parallel and High Performance Computing and its application to various Computer Science domains.

I recently graduated from IIT Roorkee in May 2011.

Current

Project

Communication-avoiding implementations for adaptive mesh refinement multigrid (AMR MG) frameworks on GPUs and distributed platforms. The project is being done in collaboration with Future Technologies Group at Lawrence Berkeley National Laboratory and Intel Research.

Courses

Spring 2012 :-

CS252 - Graduate Computer Architecture

CS267 - Applications of Parallel Computers

Fall 2011 :-
CS 281A - Statistical Machine Learning (Grade :- A-)
CS 294-76 - Communication Avoiding Algorithms (Grade :- A )

Publications

Thomas George, Vaibhav Saxena, Anshul Gupta, Amik Singh, and Anamitra R. Choudhary. Multifrontal Factorization for Sparse SPD Systems on GPUs. In Proc. IEEE International. Parallel and Distributed Processing Symp. (IPDPS), Alaska, USA, May 2011. [pdf]

Amik Singh, Naresh Kumar, Sahil Gera, and Ankush Mittal. Achieving Magnitude Order Improvement in Porter Stemmer Algorithm over Multi-Core Architecture . In Proc. IEEE Xplore, The 7th International Conference on Informatics and Systems(INFOS), Cairo, Egypt, March 2010. [pdf]

Jee Whan Choi, Amik Singh, and Richard W. Vuduc. Model-driven autotuning of sparse matrix-vector multiply on GPUs. In Proc. ACM SIGPLAN Symp. Principles and Practice of Parallel Programming (PPoPP), Bangalore, India, January 2010. [pdf]

Internships

IBM India Research Lab, New Delhi, India ( May 2010 - July 2010 )

Sparse Cholesky Factorization on GPUs

Guide :- Dr. Thomas George, Researcher, IBM Research, India. We solve the system of linear equations using Cholesky Factorization method. The Factorization cost is very high for very large 3-D problems. The objective is to reduce the factorization cost using massively parallel architecture of GPUs.

Georgia Institute of Technology, Atlanta, USA ( May 2009 - July 2009 )

Sparse Matrix Vector Multiplication (SpMV) on GPUs using Blocked Compressed Sparse Row(BCSR) Data Structure

Guide :- Dr. Richard Vuduc, Assistant Professor, College of Computing, Georgia Tech. We used a novel BLOCKED Compressed Sparse Row(BCSR) data structure instead of naive Compressed Sparse Row(CSR) to solve SpMV. Our implementation beat that of NVIDIA implementation.