Optimal Code Generation for Sequential Logic

Yunjian Jiang
(Professor Robert K. Brayton)
(SRC) 683-004

In a platform-based design context, we target (1) standardized or application specific processing platforms, and (2) automatic software generation from functional models. With a focus on control-intensive embedded systems, for instance, automobile engine, airplane, and network protocol controls, we use a network of extended finite state machines (EFSMs) as the model of computation. The research goal is to derive proper flow and point algorithms for code generation and mapping, given an existing architecture platform. Initial results are highlighted in [1,2]. Further research includes the following.

Generalized cofactoring from multi-valued relations: given a multi-valued relation, we want to find the optimal cofactoring structure that minimizes the functional evaluation cost. The generalized cofactoring structure is a DAG, where each node is associated with a binary cofactoring function, and the two out going edges represent the positive and negative cofactor. The goal is to find a set of cofactoring functions that minimize the average path length [3] of the structure.

State minimization and re-encoding: given a sequential logic network, we want to find sequential and parallel decompositions of the state machine, so that the output evaluation can be made faster.

[1]
Y. Jiang and R. K. Brayton, "Software Synthesis from Synchronous Specifications Using Logic Simulation Techniques," Design Automation Conf., New Orleans, LA, June 2002.
[2]
M. Baleani, F. Gennari, Y. Jiang, Y. Patel, R. K. Brayton, and A. Sangiovanni-Vincentelli, "HW/SW Partitioning and Code Generation of Embedded Control Applications on a Reconfigurable Architecture Platform," Int. Symp. Hardware/Software Codesign, Estes Park, CO, May 2002.
[3]
T. Sasao, Y. Iguchi, and M. Matsuura, "Comparison of Decision Diagrams for Multiple-Output Logic Functions," Int. Workshop on Logic Synthesis, New Orleans, LA, June 2002.

More information (http://www-cad.eecs.berkeley.edu/mvsis) or

Send mail to the author : (wjiang@eecs.berkeley.edu)


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