The goal of this project is to develop an ultra low power integrated circuit that will form the core of a self-contained, millimeter-scale sensing and communication platform for a massively distributed sensor network. The integrated circuit will contain sensor signal conditioning circuits, a temperature sensor, an A/D converter, microprocessor, SRAM, communications circuits, and power control circuits (Figure 1). The IC, together with the sensors, will operate from a power source integrated with the platform.
Smart Dust are millimeter-scale sensing and communication platforms [1,2] composing a distributed sensor network that can monitor environmental conditions in both military and commercial applications. These networks consist of hundreds to thousands of dust motes and a few interrogating transceivers. The motes are built from integrated circuit and micromachining processes for low-cost, low-power consumption , and small size. Communication between the motes and the receiver is accomplished via a wireless optical communication link at 1 kb/s or less.
We have demonstrated a 138 mm3 autonomous uni-directional sensing/communication mote that optically transmits a measure of the incident light level and a 63 mm3 autonomous bi-directional communication mote .
We have demonstrated a 16 mm3  autonomous solar-powered sensor node with bi-directional optical communication (Figures 2-4). The device digitizes integrated sensor signals and transmits and receives data optically. The system consists of three die: a 0.25 µm CMOS ASIC, a trench-isolation SOI solar cell array, and a micromachined four-quadrant corner-cube retroreflector (CCR, see Lixia Zhou’s research abstract), but a new MEMS process is being developed that will integrate the solar cells, CCR, and a capacitive accelerometer, yielding a 6.6 mm3 device.
A finite state machine (FSM) controls the system by multiplexing sensors, directing the ADC to take samples, and sending data to the CCR transmitter. The optical receiver operates at 375 kb/s and consumes 26 µW at 2.1 V (69 pJ/bit). The 8-bit serial ADC consumes 3.1 µW at 1 V and 100 ksamples/sec (31 pJ/sample, 4 pJ/bit). The ASIC also contains a 200 x 200 µm photosensor that provides a measure of the ambient light level.
We are just completing the testing of an ultra-low energy microprocessor that consumes less than 20 pJ/instruction (this is 1-2 orders of magnitude less than many "low power" microprocessors) and is tailored to distributed wireless sensor networks. It is 600 µm on a side. This will dramatically increase the intelligence of the mote and provide data storage and computational capability.
Figure 1: Smart Dust mote conceptual diagram
Figure 2: System diagram of the Golem Dust mote and annotated layout of the integrated circuit. Because light shields cover the active circuits, die photos are not very interesting.
Figure 3: 11.7 mm3 mock-up of Golem Dust system, showing a 0.25 µm CMOS ASIC, solar power array, accelerometer, and CCR, each on separate die. A new process is being developed to integrate everything but the ASIC into one die, which will decrease the circumscribed volume to 6.6 mm3.
Figure 4: Photograph of the mock-up in Figure 2.
Figure 5: Layout of a test chip containing the custom ultra-low energy microprocessor (large block in the upper left) and custom low power 1 k x 8 and 1 k x 17 SRAMs.