Because of the ultra-wide bandwidth of the transmitted signal, receiver design strategy has different interesting issues from narrowband systems. Given the fact that ultra wideband has several possible application areas, system-level explorations will be done in this research. Our first work will be focused on building a real-time Simulink model which includes both the analog and digital processing components in a UWB system. The simulation combined with the future UWB test board will allow us to understand more about system tradeoffs as a basis of future ultra wideband system design.
A digital back end with basic synchronization and tracking functionalities was first implemented via BEE emulation engine. With the help of FPGA testing, we could play with more sophisticated detection algorithm to improve the system performance from communication theory perspectives. An ASIC version of the baseband using the new design flow in BWRC will also be done in this project. The final goal of this project is to propose a suitable architecuture of UWB system operating between 3 GHz and 10 GHz.