A Fixed Frequency FPGA Architecture

Nicholas Weaver
(Professor John Wawrzynek)

Fixed frequency FPGAs, where any valid, mapped design runs at the intrinsic clock rate of the FPGA, offer two key advantages over conventional FPGAs: vastly increased computational throughput and significantly simpler interfacing to other logic blocks such as microprocessors. Yet previous attempts have not been successful because of either a lack of a general switched interconnect or an inability to efficiently map datapaths.

We are investigating structures which allow for efficient, pipelined FPGAs. Our primary focus is on a different form of Manhattan interconnect, a "corner turning" interconnect. This interconnect structure can be efficiently pipelined for high throughput operation and has fast polynomial-time routing algorithms.

We have defined a fixed-frequency architecture based on the Xilinx Virtex FPGA and completed a toolflow which accepts placed designs produced by the Xilinx toolflow. We have developed both a router and automatic retimer and are currently constructing the layout for a routing channel in order to estimate performance and area costs for this architecture.


More information (http://www.cs.berkeley.edu/~nweaver/) or

Send mail to the author : (nweaver@eecs.berkeley.edu)


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