## Upper Bound Estimation for the Noise Current Spectrum of Digital Circuit Blocks

Alessandra Nardi^{1} and Luca Daniel

(Professor Alberto L. Sangiovanni-Vincentelli)

Semiconductor Research Corporation

The complexity of the systems-on-a-chip design requires an aggressive
re-use of intellectual property (IP) circuit blocks. However,
IP blocks can be safely re-used only if they do not affect other
sensitive components. The switching activity of CMOS digital
circuit blocks typically produces high frequency current noise both into
the Gnd/Vdd system, and into the substrate of integrated
circuits. Such currents can potentially affect circuit reliability and
performance of other sensitive components. For instance the
Gnd/Vdd currents may produce electromigration, IR voltage drops, voltage
oscillations due to resonances, and, possibly,
electromagnetic interference. The substrate currents may couple noise to
sensitive analog circuitry through body effect or direct
capacitive coupling. An analysis of current injection due to switching
activity is needed to properly account for all such effects
during the design phase. Different effects require different types of
current injection models. For instance, power consumption
analysis requires time-domain average current estimation over several
clock periods. IR drop, electromigration, and timing
performance analysis require a time-domain noise current upper-bound
with respect to all possible combinations of the inputs.
Signal integrity, Gnd/Vdd grid resonances, electromagnetic interference,
and substrate coupling on mixed-signal ICs, on the other
hand, require an upper-bound on the spectrum of the current injected
into the Gnd/Vdd system or into the substrate, respectively.
Methodologies developed so far do not address this latter kind of
analysis. Therefore, for these problems we are developing a
methodology for estimating an upper bound over all possible input
combinations for the spectrum of the noise current injected by
the switching activity of digital blocks. The methodology identifies an
upper bound for the spectrum of a circuit noise current by
combining the noise current injected by each gate and accounting for the
circuit logic functionality.

- [1]
- A. Nardi, L. Daniel, and A. Sangiovanni-Vincentelli,
*A Methodology for the Computation of an Upper Bound on Noise Current Spectrum of CMOS Switching Activity,* UC Berkeley Electronics Research Laboratory, Memorandum No. UCB/ERL M02/20, June 2002.

^{1}Postdoctoral Researcher

More information (http://www-cad.eecs.berkeley.edu/~nardi) or

Send mail to the author : (nardi@eecs.berkeley.edu)

Edit this abstract