Light-Anodization Process for High-Jc Micron and Submicron Superconducting Junction and Integrated Circuit Fabrication

Xiaofan Meng1 and Xianghui Zeng2
(Professor Theodore Van Duzer)
(ONR) N00014-00-1-0003

Superconducting devices have a very high operation speed (up to a few hundred GHz) and extremely low power dissipation, which are essential for ultra-high-speed computing and telecommunication applications. High switch speed requires high Jc (critical current density) of 10-20 kA/cm2 and small junction area (1 mm2 or less). Most current superconducting junction and IC fabrication is still based on 2-3 mm technologies. It is important for high-speed superconducting digital applications to develop a suitable technology for micron and submicron junction and IC fabrication. When the junction areas approach micron and submicron sizes, the fabrication becomes more difficult. For 1 mm2 junction, the via through the dielectric layer to contact the junction would have to be 0.6 mm2 or less. This would require advanced photolithography tools to increase resolution and alignment accuracy. It also demands better dry-etch profile control. One common approach is to use CMP to remove the covering dielectric layer and expose the underlying metal contact. But CMP complicates the process and increases the cost. We have developed a new approach for high critical current density (Jc) small junction fabrication. The key step is light anodization that forms a thin double-layer of Al2O3/Nb2O5 oxides around the junction area and on the sidewalls of the junction. This anodization ring is a good dry-etch stop, so the via for the junction contact can be larger than the junction area. The anodization ring can also protect the junction from plasma damage during dry etching and sputtering steps, therefore, it can reduce the junction leakage current and critical-current spread. The new technique is very simple and cost effective compared with the CMP approach. It needs only one additional mask and process step. We have used the technique to fabricate high-Jc submicron Nb/Al-AlOx/Nb tunnel junctions with very low critical-current spreads. The smallest junction area is 0.3 mm2. The critical current densities are up to 20 kA/cm2. Using this technique, we have also fabricated Nb SQUIDs and various Nb digital ICs. MIT Lincoln Laboratory, Hypres, and TRW have successfully adopted the new technique in their superconducting IC processes.

1Staff
2Staff

Send mail to the author : (meng@eecs.berkeley.edu)


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