PLA-based Regular Structures and Their Synthesis

Fan Mo
(Professor Robert K. Brayton)
GSRC

We propose two regular circuit structures based on the programmable logic array (PLA). They provide alternatives to the widely used standard cell structure and have better predictability and simpler design methodologies. A whirlpool PLA is a cyclic four-level structure, which has a compact layout. Doppio-ESPRESSO, a four-level logic minimization algorithm, is developed for the synthesis of Whirlpool PLAs. A river PLA is a stack of multiple output PLAs, which uses river routing for the interconnections of the adjacent PLAs. A synthesis algorithm for river PLAs uses simulated annealing, targeting a combination of minimal area and delay.

[1]
F. Mo and R. K. Brayton, "River PLA: A Regular Circuit Structure," Design Automation Conf., New Orleans, LA, June 2002.
[2]
F. Mo and R. K. Brayton, "Whirlpool PLAs: A Regular Logic Structure and Their Synthesis," ICCAD, San Jose, CA, November 2002.

Send mail to the author : (fanmo@eecs.berkeley.edu)


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