High Linearity Broadband MOS Attenuator Design

Hakan Dogan
(Professor Robert G. Meyer)

Modern cable and wireless communication systems require gain control in the signal path. For example, a CDMA phone needs adequate control of its output power in order to maintain an efficient link between the user and the base station. Depending on the distance between the receiver and the base station, the received power may vary by orders of magnitude. Hence, gain control circuitry is needed to limit the incident power to the receiver chain. Therefore, much effort has been put into the design of attenuators that can be used as a means of controlling the received signal strength.

Attenuators with a broad response are desirable since they can be used in applications operating over different frequency bands. There are two main methods to build broadband attenuators. PIN diode attenuators have been used for this purpose. Although they are very linear, broadband, and able to handle high power, their main drawbacks are constant power dissipation and difficulty in integrating them on-chip. FET's ability to be used as a voltage controlled variable resistor in the triode region makes them another suitable choice in the design of attenuators. GaAs MESFETs have been the traditional choice in the design of attenuators due to their superior high-frequency performance compared to MOSFETs. However, the low cost and availability of CMOS makes it an attractive choice of technology for attenuator design. Furthermore, the downscaling of CMOS technology continues to provide transistors with higher fTs, which are more suitable for broadband RF-IF attenuators.

The goal of this research project is to analyze and design broadband CMOS attenuators, which can be integrated on-chip. The focus will be on possible advancements in the design of attenuators on the circuit level as well as on the device level. Device and circuit optimization will be studied for distortion, frequency response, power-handling capability, and insertion loss. Gain control circuitry will be designed for linear attenuation with the control voltage. Various attenuator ICs will be designed and tested for verification of the analysis.

[1]
P. S. Bachert, "FET Attenuator, 0-1 GHz," Applied Microwave and Wireless, Vol. 8, No. 2, Spring 1996.
[2]
J. Browne, "Digital Attenuators Cut Bit Errors through 4 GHz," Wireless System Design, August 2000.

More information (http://www.eecs.berkeley.edu/~dogan) or

Send mail to the author : (dogan@eecs.berkeley.edu)


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