Aggressively Scaled FinFETs: the Effectiveness of Process-induced Strain (FinStrain)
Nuo Xu, Tsu-Jae King Liu, Munkang Choi1, Victor Moroz2 and Wade Xiong3
IMPACT and UC-SMART
The stress transfer efficiency (STE) and impact of process-induced stress on carrier mobility enhancement in aggressively scaled FinFETs are studied for different stressor technologies, substrate types, and gate-stack formation processes. TCAD simulations show that strained-source/drain STE is 1.5× larger for bulk FinFETs than for SOI FinFETs. Although a gate-last process substantially enhances longitudinal stress within the channel region, it provides very little improvement in electron mobility over that achieved with a gate-first process. Guidelines for FinFET stressor technology optimization are provided, and performance enhancement trends for future technology nodes are projected. Relevant publications [1-3]
Figure 1: Various Stressor Solutions for FinFET Devices
Figure 2: Resulted longitudinal (Sxx) and vertical (Szz) stress profiles from these above stressors
- N. Xu*, B. Ho, M. Choi, V. Moroz, T.-J. King Liu, “Effectiveness of Stressors in Aggressively Scaled FinFETs,” IEEE Transactions on Electron Devices, 59, pp.1592-1598, 2012.
- N. Xu*, B. Ho, F. Andrieu, L. Smith, B.-Y. Nguyen, O. Weber, T. Poiroux, O. Faynot, T.-J. King Liu, “Carrier Mobility Enhancement via Strain Engineering in Future Thin-Body MOSFETs,” IEEE Electron Device Letters, 33, pp.318-320, 2012.
- N. Xu*, X. Sun, W. Xiong, C. R. Cleavelin and T.-J. King Liu, “MuGFET Carrier Mobility and Velocity: the Impacts of Fin Aspect Ratio, Orientation and Stress,” IEEE International Electron Device Meeting (IEDM 10’), San Francisco, CA, USA, Tech. Dig.p.194, 2010.