RePar: Reconfigurable Parallel Computing (RePar)
*** THIS PROJECT IS NO LONGER ACTIVE ***
John Wawrzynek and Greg Gibeling
Through the use of a novel representation, called Dataflow Stencil, for computing applications we can combine ideas from high level synthesis, parallel computing and high productivity programming. This in turn enables the creation of a Solution Compiler, capable of synthesizing simple high level descriptions into high performance, parallel implementations on hardware platforms ranging from FPGAs to CPUs, and combinations in between.