Monolithic Silicon Photonics for Processor-to-DRAM Interconnects
Scott Beamer, Yong-jin Kwon, Christopher Batten1, Chen Sun2, Ajay Joshi3, Krste Asanović and Vladimir Stojanovic4
Defense Advanced Research Projects Agency
In a collaboration with the MIT Center for Integrated Photonic Systems, researchers from the ICSI Architecture Group are exploring the use of silicon photonics for processor-to-memory interconnect. Projected advances in electrical signaling seem unlikely to fulfill the memory bandwidth demands of future manycore processor chips. Monolithic silicon photonics, which integrates optical components with electrical transistors in a conventional CMOS process, is a promising new technology that could provide large improvements in achievable interconnect bandwidth. In a DARPA-funded effort, the ICSI Architecture Group is exploring possible memory interconnect schemes to exploit the new photonic device and circuit technology being developed at MIT.