60 GHz CMOS Integrated Power Amplifier
Debopriyo Chowdhury, Ali Niknejad and Jiashu Chen
The design of CMOS power amplifier at mm-wave frequencies remains a big challenge due to the low supply voltage, lossy on-chip passives and a limit on device sizes that can be effectively used at these frequencies. The goal of this research project is to demonstrate a +17 dBm power amplifier at 60 GHz using 65 nm digital CMOS process at 1 V, employing transformer based topologies. Layout structures for transformers and CMOS transistors are also being investigated in order to determine an optimal layout for a power device at mm-wave frequencies. A two-stage power amplifier using low-loss transformers has been designed and measured. Millimeter wave performance of transformers has also been measured and characterized. The amplifier is stable over all frequencies and achieves an output power of 9 dBm at 60 GHz at its 1 dB compression point and 12.3 dBm saturated power. The linear gain is close to 6 dB over a wide bandwidth of 22 GHz.
Figure 1: A 90nm 60GHz transformer-coupled power amplifier