Low Power All-Digital Transceiver for Wireless Sensor Network
As CMOS continues its trend of scaling, RF wireless circuits that are analog-intensive become incompatible with a digital baseband, which is built in a low-voltage deep-submicron process with limited voltage headroom. The goal of this project is to develop an all-digital transceiver with minimum power consumption, and this transceiver will be integrated with the microprocessor currently worked on by George Shaw. The application for this transceiver is for wireless sensor network. This transceiver will operate at frequency band of 2.4 GHz with the capability of sending and receiving 2M chip/sec through MSK.
The first tape-out will aim to study the feasibility of a crystal-less all-digital VCO. The goal is to meet the IEEE 802.15.4 spectrum mask and EVM. The quality factor of the on-chip inductor is a big concern. High Q inductors are needed to reduce VCO close-in phase noise, especially when there is no crystal to lock into. Solutions to low-cost higher Q inductors are printed inductors, bond-wire inductors, etc. Printed inductors will be added on top of the passivation layer to get higher Q inductors if needed