Electrical Engineering
      and Computer Sciences

Electrical Engineering and Computer Sciences

COLLEGE OF ENGINEERING

UC Berkeley

   

2009 Research Summary

Multi-Gb/s 60 GHz Wireless Transceiver Design for Mobile Applications

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Chintan Thakkar, Elad Alon and Ali Niknejad

Ultra-high data-rate wireless communication over the 60 GHz band has gained increasing interest for potentially high data-rate transfer, lossless multimedia streaming, and collaborative communication. Both academic and industrial groups have begun to demonstrate transceiver solutions for applications such as in-home HDTV streaming. Since these designs are targeted at set-top boxes with multi-Watt level power dissipation, communication techniques with relatively high levels of circuit and signal processing complexity (such as OFDM) can be applied. However, in order to enable the use of the 60 GHz band for high data-rate local communication in a mobile handset environment, the energy efficiency of the overall transceiver must be drastically improved. Our work is therefore focused on minimizing the energy-per-bit of a multi-Gb/s 60 GHz transceiver through comprehensive design and optimization of the circuit components and communication system.

As a first step to maximizing a transceiver’s energy efficiency, it is critical to study and fully characterize the communication channel since it dictates the constraints and requirements of the overall design. While other groups have begun such channel modeling/characterization efforts as well, their focus has been mostly on fixed transceivers with highly directional antennas (neither of which may be appropriate for a handset application). Thus, we have been conducting a set of experimental measurements of various 60 GHz channels at BWRC. This set of measurements has been leveraged to make intelligent decisions about the transceiver’s coding, modulation, and equalization strategies--in particular taking into account the implications on both the RF and baseband circuit requirements in terms of dynamic range, complexity, and power consumption.

In order to further understand key design techniques and challenges and gain an insight into the optimization space, a fully-integrated 60 GHz transceiver with baseband circuitry has been implemented. The baseband, which includes an on-chip pattern memory and PRBS generator and error checker, has been designed and tested to operate at 5 GSym/s on each I & Q channels, with capability of QPSK, 16-QAM and 64-QAM data generation and reception. Among other tests (including demonstrations of 6 Gb/s wired and 4 Gb/s wireless data transfer), the wireless channel response at 60 GHz was measured using external, directional horn antennas. To further support channel measurements (including all non-idealities of the circuit components themselves), this transceiver will be packaged with antennas of varying efficiency and directionality.

Figure 1
Figure 1: Measuring the 60 GHz channel (chip-photo courtesy: C. H. Doan, S. Emami, A. M. Niknejad, and R. W. Brodersen, “A 60-GHz down-converting CMOS single-gate mixer,” RFIC Digest of Papers, 2005.)