Electrical Engineering
      and Computer Sciences

Electrical Engineering and Computer Sciences


UC Berkeley


2009 Research Summary

Interval-Value Based Circuit Simulation for Statistical Circuit Design

View Current Project Information

Qian Ying Tang and Costas J. Spanos

Semiconductor Research Corporation SRC GRC

The growing impact of process variation on circuit performance requires statistical design approaches in which circuits are designed and optimized subject to an estimated variation. Traditionally, process variation has been taken into account through SPICE corner models, defined based on extreme processing conditions. However, the circuit performance estimated using such an approach is typically pessimistic. Monte-Carlo simulation does give a more accurate estimation of the performance distribution, but the large runtime penalty prevents such a technique from being used in a practical manner.

In this work, an interval-value based circuit simulation engine is proposed to estimate the circuit performance distribution without Monte-Carlo simulations. To address the error explosion problem in traditional interval-value calculations, a variant utilizing affine arithmetic as proposed by [1] is adopted. A novel, moment-preserving algebra is introduced for non-affine operations (multiplication, division, etc.,) of two interval-valued numbers for further reducing the accumulated error.

Excellent accuracy in transient simulation results have been obtained for RC ladders, circuits with nonlinear element and simple transistor circuits. The runtime scales linearly with the number of noise variables involved in the interval representation. Experiments show a typical runtime within 100X of a single SPICE run with further improvements possible.

Figure 1
Figure 1: Flow of interval-valued circuit simulation

Figure 2
Figure 2: Transient simulation results of simple transistor circuit

L. H. de Figueiredo and J. Stolfi, "Affine Arithmetic: Concepts and Applications," Numerical Algorithms, Vol. 37, No. 1–4, 2004, pp. 147–158.
J. D. Ma and R. A. Rutenbar, “Fast Interval-Valued Statistical Interconnect Modeling and Reduction," Proceedings of the International Symposium on Physical Design, San Francisco, CA, April 2005.
D. E. Hocevar et al., “Transient Sensitivity Computation for MOSFET Circuits,” IEEE Trans. on CAD of IC, Vol 4, Issue 4, October 1985, pp. 609-620.
K. Qian and C. J. Spanos, “A Comprehensive Model of Process Variability for Statistical Timing Optimization,” Proceedings of SPIE, San Jose, CA, 2008.