Electrical Engineering
      and Computer Sciences

Electrical Engineering and Computer Sciences


UC Berkeley


2009 Research Summary

Performance-based Mask Optimization

View Current Project Information

Yu Ben and Costas J. Spanos


In its attempts to bridge the gap between the ever-shrinking device size, while effectively keeping the illumination wavelength constant, the Integrated Circuit community has been facing the problem of losing geometrical fidelity. Several approaches exist in order to circumvent this problem, including most notably optical proximity correction (OPC) [1] and inverse lithography [2]. These techniques minimize the geometric error between the projected image and the original design pattern by modifying the mask pattern. This project deviates from the conventional approach which only takes geometric shape into account, by including electrical performance as an objective. In this approach, the mask pattern that is being corrected comes from a standard cell library. The features on the mask can be modified in two ways. One is to discretize the entire mask into pixels and change the tone of every pixel; the other is to divide the pattern edge into line segments and move them separately. Electrical performance (e.g., inverter delay) variation due to process variation (e.g., dose and defocus) is treated as the objective function which is then minimized by changing the mask pattern. A fast aerial image calculation technique [3] is invoked to estimate the sensitive area which affects the pattern and performance of interest. This can reduce significantly the search space dimension, hence saving computation time. Preliminary optimization results on a single inverter shows the inverter delay variation can be reduced by half compared to the variation without optimization.

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P. Davids and S. B. Bollepalli, "Generalized Inverse Problem for Partially Coherent Projection Lithography," Proc. of SPIE Vol. 6924, 2008.
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