Electrical Engineering
      and Computer Sciences

Electrical Engineering and Computer Sciences


UC Berkeley


2009 Research Summary

BSIM for Mixed Mode Circuit Simulation Using Advanced CMOS (BSIM)

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Mohan Vamsi Dunga, Darsen Duane Lu, Chung-Hsun Lin, Tianjiao Zhang, Chenming Hu and Ali Niknejad

Semiconductor Research Corporation 1454.001

The continuous evolution of bulk CMOS technology has fueled the growth of the microelectronics industry for the past several decades. Even as we reach the "end" of the technology roadmap for bulk CMOS, the demand for bulk CMOS is healthy. The BSlM series of compact MOSFET models are industry standards successfully used throughout the semiconductor industry and the research community for digital and analog circuit design. Incorporation of new physical effects, support of new materials and devices, and the ability to handle variation in advanced processes represent a critical semiconductor industry need for designs utilizing bulk CMOS and partially and fully depleted SOI.

Toward this end, the bulk and SOI models are being improved to support devices with High-K dielectric/metal gate stack. The enhanced gate tunneling current model will be able to capture leakage due to the Frenkel-Poole tunneling mechanism. Surface optical phonon scattering has been found to be a possible mobility degradation mechanism in MOSFETs with High-K dielectrics [1]. Investigation is being done to determine whether this new mechanism is crucial for the modeling of I-V in High-K/metal gate MOSFETs.

As the minimum device area in advanced technology keeps shrinking, flicker noise (or 1/f noise) in small-area devices deviates from its well known 1/f behavior. The noise spectrum varies from device to device, therefore one nominal flicker-noise model is no longer sufficient. A new flicker noise model, which is able to describe the statistical noise behavior in a small device will be developed.

Figure 1
Figure 1: Flicker noise variation in a small-area device predicted by the model

R. Chau, S. Datta, M. Doczy, B. Doyle, J. Kavalieros, and M. Metz, "High-K/Metal-Gate Stack and Its MOSFET Characteristics," Electronic Device Letters, Vol. 25, No. 6, June 2004.