Electrical Engineering
      and Computer Sciences

Electrical Engineering and Computer Sciences

COLLEGE OF ENGINEERING

UC Berkeley

   

2009 Research Summary

60 GHz CMOS Integrated Power Amplifier

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Debopriyo Chowdhury and Ali Niknejad

C2S2

The design of a CMOS power amplifier at mm-wave frequencies remains a big challenge due to the low supply voltage, lossy on-chip passives, and a limit on device sizes that can be effectively used at these frequencies. The goal of this research project is to demonstrate a power amplifier at 60 GHz using 90 nm digital CMOS process at 1 V, employing transformer-based topologies. Layout structures for transformers and CMOS transistors are also being investigated in order to determine an optimal layout for a power 90 nm CMOS device at mm-wave frequencies. A two-stage power amplifier using low-loss transformers has been designed and measured. Millimeter-wave performance of transformers has also been measured and characterized. The amplifier is stable over all frequencies and achieves an output power of 9 dBm at 60 GHz at its 1 dB compression point and 12.3 dBm saturated power. The linear gain is close to 6 dB over a wide bandwidth of 22 GHz.

Figure 1
Figure 1: A 90 nm 60 GHz transformer-coupled power amplifier