Electrical Engineering
      and Computer Sciences

Electrical Engineering and Computer Sciences


UC Berkeley


2009 Research Summary

Minimum PCB Footprint Point-of-Load DC-DC Realized with Switched-Capacitor

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Vincent Wai-Shan Ng, Michael Douglas Seeman and Seth R. Sanders

National Semiconductor

This project explores the design and test of a CMOS-based Switched Capacitor (SC) dc-dc conversion integrated circuit (IC) for the point-of-load (POL) application, conventionally addressed with the ubiquitous buck converter. The buck converter requires at least one substantial inductor, which takes up a significant proportion of the overall printed-circuit-board (PCB) area that the converter occupies. By using an SC dc-dc converter, this inductor is replaced by a few (much smaller) power-train capacitors, which results in a much-reduced PCB area and component cost. Figure 1 shows a comparison of this work with other works from industry and literature. The table also includes preliminary data for an improved second design that is currently being designed.

Figure 1 shows that the power-train capacitors of SC converters take up a much smaller PCB area, have a smaller height, and cost less than the inductor of the surveyed buck converters. Only inductors and power-train capacitors are compared here because other key components such as input/output capacitors are necessary and similar for both the buck and SC converters. Auxiliary passives required for compensation, start-up, etc., are neglected since these are not fundamental and are eliminated or minimized in leading modern designs. The estimated cost of power-train capacitors or inductors are based on large-volume-purchase per-unit prices from Digikey. Further, the SC converters developed here show higher peak and wide-load-range efficiencies than the conventional buck converters.

Figure 1
Figure 1: Comparison with other work