Electrical Engineering
      and Computer Sciences

Electrical Engineering and Computer Sciences


UC Berkeley


2008 Research Summary

Low-Power High-Resolution Vibratory Gyroscope Readout Interface

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Bernhard Boser and Chinwuba David Ezekwe

We have developed a vibratory gyroscope readout circuit that combines several techniques to enable an unprecedented level of power savings. Chief among the techniques are automatic mode-matching, positive position sigma-delta force-feedback, and current integrator based position sensing. Mode-matching relaxes the electronic noise budget of the front-end amplifier by the sense Q, resulting in a proportional reduction in front-end power dissipation. Unfortunately, it also results in an extremely narrow open-loop sensor bandwidth owing to the high sense Q, and substantial scale factor and phase uncertainty induced by Q and resonance frequency variations with process and temperature. These problems are overcome in this design by using force feedback to achieve good scale factor stability, a well defined phase relationship to reject quadrature error, and a bandwidth well in excess of 50 Hz, commensurate with the requirements of automotive and consumer applications. Unfortunately, with feedback comes the problem of potential closed-loop instability. High-Q higher-order resonance modes in vacuum packaged devices present additional challenges. The positive position feedback technique addresses this problem and is key to the stable operation of the force-feedback loop. Positive position feedback is combined with the sigma-delta technique to provide inherent A/D conversion. The current integrator based position sense front-end trades the high linearity and gain stability of conventional front-ends for substantially lower power dissipation. The force-feedback loop enables its use without compromising overall system performance since feedback attenuates the error due to the nonlinearity and gain variation of the elements in the loop's forward path. These techniques were implemented in a 0.35 µm CMOS ASIC, which dissipates less than 300 uA from 3.3 V and achieves a Brownian noise limited noise floor of 0.004 deg/sec/rtHz over a 50 Hz Band.