Process Characterization Using Variation Measurements in SRAM Arrays
Andrew Evert Carlson, Zheng Guo, Tsu-Jae King Liu and Borivoje Nikolic
Variation in device parameters such as channel doping and gate length are an increasing challenge for continued scaling. Static Random-Access Memories (SRAM) exhibit a heightened sensitivity to device variations, due to their use of minimum-size transistors. In particular, the sensitivities of various SRAM read and write metrics to specific parameters in individual devices can be determined via simulation. These sensitivities and the measurements from many cells in fabricated arrays are expected to enable fast characterization of the variability in a process, expediting process development. A 45 nm SRAM test chip has been fabricated to investigate the precision with which device parameter statistics can be extracted.