Electrical Engineering
      and Computer Sciences

Electrical Engineering and Computer Sciences

COLLEGE OF ENGINEERING

UC Berkeley

   

2008 Research Summary

Post Decomposition Assessment of Double Patterning Layout

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Juliet Alison Rubinstein and Andrew R. Neureuther

Pattern matching methods are examined as fast-CAD tools for full-chip across process window examination of post-decomposition double patterning layouts. The goal is to demonstrate the ability to anticipate lithographic weakness due to many sources. This includes the decomposition strategy itself, OPC of individual sub-layers, focus-exposure process window and illumination. This study is an intermediate step to using fast-CAD assessment tools within pattern decomposition algorithms to guide decisions based on lateral influences instead of rules. Pattern decomposition for double patterning is a largely heuristic-based procedure, and this project investigates a fast method to determine the quality of the split.

This project examines split layouts for lithographic weakness using the fast-CAD technique of pattern matching. This study uses examples from the literature such as those presented by Drapeau [1], and are examined under annular illumination. Match factors are introduced for various image quality metrics and sensitivities to lithography parameters. First-cut accurate linear and quadratic edge placement error models are then applied. The match factors and edge placement models are extensions for those introduced by McIntyre [2] and Holwill [3]. Once expected hot-spots are found, a local image simulation is carried out to compare the first-cut edge placement estimate with that from image simulation.

[1]
M. Drapeau, V. Wiaux, E. Hendrickx, S. Verhaegen, and T. Macida, "Double Patterning Design Split Implementation and Validation for the 32 nm Node," Proceedings of the SPIE, Vol. 6521, 2007, pp. 652109.
[2]
G. Mcintyre, J. Holwill, and A. R. Neureuther, "Screening Layouts for High-Numerical Aperture and Polarization Effects Using Pattern Matching," Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures, Vol. 23, Issue 6, November 2005, pp. 2646-2652.
[3]
J. Holwill, G. Mcintyre, W. Poppe, and A. R. Neureuther, "Layout 'Hot Spots' for Advancing Optical Technologies," Proceedings of the SPIE, Vol. 6154, 2006, pp. 1212-1220.