The Design of Digital Circuits Robust to Process Variations
Borivoje Nikolic and Ji-Hoon Park
The performance variation caused by device parameter fluctuations is becoming detrimental in digital circuit designs as devices are scaled down to the deep-submicron dimension. Without addressing this issue, further costly scaling of devices would not guarantee the scaling benefit the industry has enjoyed for decades.
The purpose of this research is to find circuit structures and design methodologies to combat the process variation. Specifically, the Viterbi decoder is chosen to be a benchmarking platform because of its well-researched circuits, so that we can examine various approaches to the structure. As a first step, compact delay models including variation effects are being investigated. The results are expected to be applied in order to add another dimension to the optimum design of general digital circuits.