Electrical Engineering
      and Computer Sciences

Electrical Engineering and Computer Sciences

COLLEGE OF ENGINEERING

UC Berkeley

   

2008 Research Summary

Communication Synthesis (COSI)

View Current Project Information

Alessandro Pinto, Luca Carloni1 and Alberto L. Sangiovanni-Vincentelli

Advancement in technology allows for the development of a powerful and cheap hardware platform that can implement an increasing amount of functionality within the same device. In order to meet the stringent time-to-market requirements, engineers cannot afford to design every single component of such architectures from scratch, but they are forced to re-use components. The system-level design problem in the context of architecture platforms is not about intellectual property development but component integration. When devices like wireless nodes, mobile devices, sensors, cameras, etc. become a commodity for larger systems, the problem is to orchestrate their cooperation in such a way that a specific functionality can be successfully deployed on the resulting distributed architecture. Again, the problem of system-level design for large scale systems like buildings, hospitals, and airplanes is not about component design but component integration.

Communication synthesis is an enabling technology that, given a set of point-to-point quality of services (QoS) and given a description of the available communication components, automatically builds a network that guarantees the required QoS while minimizing network cost [1]. The Communication Synthesis Infrastructure project (COSI) [2] at the University of California, Berkeley aims to develop and implement a set of algorithms for communication synthesis that include topology and protocol synthesis. COSI has been used in two application domains: System-on-Chips [3,4] and building automation systems [5].

[1]
A. Pinto, A. Bonivento, A. L. Sangiovanni-Vincentelli, R. Passerone, and M. Sgroi, "System Level Design Paradigms: Platform-Based Design and Communication Synthesis," ACM Trans. Design Automation of Electronic Systems.
[2]
http://embedded.eecs.berkeley.edu/cosi.
[3]
A. Pinto, L. P. Carloni, and A. L. Sangiovanni-Vincentelli, Synthesis of Low Power NOC Topologies under Bandwidth Constraints," UC Berkeley EECS Department Technical Report No. UCB/EECS-2006-137, October 24, 2006.
[4]
A. Pinto, L. P. Carloni, and A. L. Sangiovanni-Vincentelli, Synthesis of On-Chip Interconnection Structures: From Point-To-Point Links to Networks-on-Chip, UC Berkeley EECS Department Technical Report No. UCB/EECS-2006-147, November 14, 2006.
[5]
A. Pinto, L. P. Carloni, and A. L. Sangiovanni Vincentelli, "A Communication Synthesis Infrastructure for Heterogeneous Networked Control Systems and Its Application to Building Automation and Control," EMSOFT 2007, Salzurg, Austria, 2007.

1Columbia University