Wakeup Receiver for Wireless Sensor Nodes
Nathan Michael Pletcher and Jan M. Rabaey
Wireless sensor nodes require an ultra-low power RF transceiver in order to meet the stringent power requirements of the system. Since the transceiver consumes power whenever it is active, it would be advantageous to leave the receiver off and wake it up only when data is being received. This research explores a minimum power RF receiver that would detect a wakeup signal from other nodes and activate the node's main transceiver for data transfer. The goal is to trade the performance of high data rate, higher power radios for an extremely low power receiver that senses only the wakeup signal.
To minimize the power consumption of the RF circuit blocks, several techniques are being investigated. At the architecture level, the stringent power specification dictates simplification and the aggressive use of modern CMOS and MEMS technologies. At the circuit level, one potential technique for lowering the power consumption is to choose circuit topologies that may operate with very low supply voltages, even below the nominal Vdd of the CMOS technology.
A prototype wakeup receiver has been designed and fabricated in a 90 nm CMOS process. A block diagram is shown in Figure 1. The receiver uses a tuned RF architecture to obviate the need for a power-hungry VCO and incorporates a high-Q bulk acoustic wave (BAW) resonator in the front-end amplifier (FEA) to filter the input signal. The entire receiver, including baseband amplifiers and analog-digital converter (ADC) with integrated bandgap reference (BGR), operates from a low 0.5 V supply. Receiver measurements of the prototype confirm that the total power consumption is 65 µW with a raw sensitivity of -49 dBm for 12 dB baseband SNR .
Figure 1: Block diagram of proposed wakeup receiver
- N. Pletcher, S. Gambini, and J. Rabaey, "A 65 µW, 1.9 GHz RF to Digital Baseband Wakeup Receiver for Wireless Sensor Nodes," IEEE Custom Integrated Circuits Conference, September 2007.