Master's Theses & Technical Reports - Jan M. Rabaey
M.S.
Automated Design for Current-Mode Pass-Transistor Logic Blocks
Matthew David Pierson [2007]
Ultra Low Power Clock Generation
Asako Toda [2007]
A System Architecture for Ambient Intelligent Environments
Christopher R. Baker [2006]
Low Voltage Analog to Digital Converter Design in 90nm CMOS
Simone Gambini [2006]
5th Year M.S.
Equalization for Intracortical Microstimulation Artifact Reduction
Philip Chu [2013]