Master's Theses & Technical Reports - Krste Asanović
M.S.
Resilient Design Methodology for Energy-Efficient SRAM
Brian Zimmer [2012]
Efficient VLSI Implementations of Vector-Thread Architectures
Yunsup Lee [2011]
Improving Energy Efficiency and Reducing Code Size with RISC-V Compressed
Andrew Waterman [2011]
The Case for User-Level Preemptive Scheduling to Support Multi-Rate Audio Applications for Multi-Core Processors
Rimas Avizienis [2011]
Designing Multisocket Systems with Silicon Photonics
Scott Beamer [2009]
5th Year M.S.
Hardware Construction in Chisel
Huy Vo [2013]
L2 Cache to Off-chip Memory Networks for Chip Multiprocessor
Carrell Killebrew [2008]