Technical Reports - Krste Asanović

Instruction Sets Should Be Free: The Case For RISC-V (EECS-2014-146)
Krste Asanović and David A. Patterson

Building an Adaptive Operating System for Predictability and Efficiency (EECS-2014-137)
Gage Eads, Juan Colmenares, Steven Hofmeyr, Sarah Bird, Davide Bartolini, David Chou, Brian Glutzman, Krste Asanović and John D. Kubiatowicz

The RISC-V Instruction Set Manual, Volume I: User-Level ISA, Version 2.0 (EECS-2014-54)
Andrew Waterman, Yunsup Lee, David A. Patterson and Krste Asanović

Resilient Design Methodology for Energy-Efficient SRAM (EECS-2013-37)
Brian Zimmer, Borivoje Nikolic and Krste Asanović

Distributed Memory Breadth-First Search Revisited: Enabling Bottom-Up Search (EECS-2013-2)
Scott Beamer, Aydın Buluc ̧, Krste Asanović and David A. Patterson

Searching for a Parent Instead of Fighting Over Children: A Fast Breadth-First Search Implementation for Graph500 (EECS-2011-117)
Scott Beamer, Krste Asanović and David A. Patterson

The RISC-V Instruction Set Manual, Volume I: Base User-Level ISA (EECS-2011-62)
Andrew Waterman, Yunsup Lee, David A. Patterson and Krste Asanović

SEJITS: Getting Productivity and Performance With Selective Embedded JIT Specialization (EECS-2010-23)
Bryan Catanzaro, Shoaib Ashraf Kamil, Yunsup Lee, Krste Asanović, James Demmel, Kurt Keutzer, John Shalf, Katherine A. Yelick and Armando Fox

Designing Multisocket Systems with Silicon Photonics (EECS-2009-189)
Scott Beamer

Re-architecting DRAM with Monolithically Integrated Silicon Photonics (EECS-2009-179)
Scott Beamer, Chen Sun, Yong-jin Kwon, Ajay Joshi, Christopher Batten, Vladimir Stojanovic and Krste Asanović

Virtual Local Stores: Enabling Software-Managed Memory Hierarchies in Mainstream Computing Environments (EECS-2009-131)
Henry Cook, Krste Asanović and David A. Patterson

Designing Multi-socket Systems Using Silicon Photonics (EECS-2009-9)
Scott Beamer, Krste Asanović, Chris Batten, Ajay Joshi and Vladimir Stojanovic

The Parallel Computing Laboratory at U.C. Berkeley: A Research Agenda Based on the Berkeley View (EECS-2008-23)
Krste Asanovic, Ras Bodik, James Demmel, Tony Keaveny, Kurt Keutzer, John D. Kubiatowicz, Edward A. Lee, Nelson Morgan, George Necula, David A. Patterson, Koushik Sen, John Wawrzynek, David Wessel and Katherine A. Yelick

The Landscape of Parallel Computing Research: A View from Berkeley (EECS-2006-183)
Krste Asanovic, Ras Bodik, Bryan Christopher Catanzaro, Joseph James Gebis, Parry Husbands, Kurt Keutzer, David A. Patterson, William Lester Plishker, John Shalf, Samuel Webb Williams and Katherine A. Yelick

RAMP: A Research Accelerator for Multiple Processors (EECS-2006-158)
John Wawrzynek, Mark Oskin, Christoforos Kozyrakis, Derek Chiou, David A. Patterson, Shih-Lien Lu, James C. Hoe and Krste Asanovic

RAMP: Research Accelerator for Multiple Processors - A Community Vision for a Shared Experimental Parallel HW/SW Platform (CSD-05-1412)
Arvind, Krste Asanovic, Derek Chiou, James C. Hoe, Christoforos Kozyrakis, Shih-Lien Lu, Mark Oskin, David Patterson, Jan Rabaey and John Wawrzynek

The PHiPAC v1.0 Matrix-Multiply Distribution (CSD-98-1020)
Jeff A. Bilmes, Krste Asanovic, Chee-Whye Chin and Jim Demmel

Vector Microprocessors (CSD-98-1014)
Krste Asanovic

T0 Engineering Data (CSD-97-931)
Krste Asanovic and James Beck

Torrent Architecture Manual (CSD-97-930)
Krste Asanovic and David Johnson

Development of a Connectionist Network Supercomputer (CSD-93-749)
Krste Asanovic, James Beck, Jerry Feldman, Nelson Morgan and John Wawrzynek

CNS-1 Architecture Specification (CSD-93-747)
Krste Asanovic, James Beck, Tim Callahan, Jerry Feldman, Bertrand S. Irissou, Brian Kingsbury, Phil Kohn, John Lazzaro, Nelson Morgan, David Stoutamire and John Wawrzynek

Evaluation of a "Stall" Cache: An Efficient Restricted On-chip Instruction Cache (CSD-91-641)
Klaus Erik Schauser, Krste Asanovic, David A. Patterson and Edward H. Frank