Electrical Engineering
      and Computer Sciences

Electrical Engineering and Computer Sciences

COLLEGE OF ENGINEERING

UC Berkeley

Compressed Sensing ICs for Bio-Sensor Applications

Kevin Park

EECS Department
University of California, Berkeley
Technical Report No. UCB/EECS-2014-102
May 16, 2014

http://www.eecs.berkeley.edu/Pubs/TechRpts/2014/EECS-2014-102.pdf

In recent years, interest towards wearable sensors and medical monitoring has exploded. Despite efforts to improve health care with medical technology, many people still die today from the lack of proper health management. Bio-sensors can provide long-term, continuous monitoring of key bio-signals and enable proactive personal health management [1]. Since the bio-sensors are worn in some manner, ultra-low power consumption is critical. Conventional sensors use Nyquist sampling to capture key information in bio-signals; hence, the operation is very costly. Compressed sensing exploits data redundancy arising from a low rate of significant events in a sparse signal. The data is compressed at the sensor node and therefore, the power required to transmit the compressed information to a receiver (e.g., smartphone) is minimized. The compression factor of a sparse bio-signal can be much larger than one, thus providing significant power efficiency in wireless sensors. [2] and [3] assume that the bio-signals have constant rate of information with minimal noise. This report presents a compressed sensing front-end for bio-signal applications that dynamically adjusts the compression factor, and increases the accuracy of reconstruction by removing noise with spike detection. This report includes the design and simulation of a low power differential ADC and the analysis of the proposed compressed sensing DSP with a 32 nm CMOS process. The DSP is estimated to consume 0.525 W at VDD = 0.4 V. The ADC uses the SAR architecture with a hybrid capacitive array with floating voltage shield, a Strongarm comparator, and digital SAR logic. The ADC consumes 9.8 nW at VDD = 1.05V and has 9.7-bits of resolution running at 20 kHz. Significant power savings are possible with compressed sensing and its influence will be key in driving the revolution of wearable sensors and medical monitoring.

Advisor: David Allstot


BibTeX citation:

@mastersthesis{Park:EECS-2014-102,
    Author = {Park, Kevin},
    Title = {Compressed Sensing ICs for Bio-Sensor Applications},
    School = {EECS Department, University of California, Berkeley},
    Year = {2014},
    Month = {May},
    URL = {http://www.eecs.berkeley.edu/Pubs/TechRpts/2014/EECS-2014-102.html},
    Number = {UCB/EECS-2014-102},
    Abstract = {In recent years, interest towards wearable sensors and medical monitoring has exploded. Despite efforts to improve health care with medical technology, many people still die today from the lack of proper health management. Bio-sensors can provide long-term, continuous monitoring of key bio-signals and enable proactive personal health management [1]. Since the bio-sensors are worn in some manner, ultra-low power consumption is critical. Conventional sensors use Nyquist sampling to capture key information in bio-signals; hence, the operation is very costly. Compressed sensing exploits data redundancy arising from a low rate of significant events in a sparse signal. The data is compressed at the sensor node and therefore, the power required to transmit the compressed information to a receiver (e.g., smartphone) is minimized. The compression factor of a sparse bio-signal can be much larger than one, thus providing significant power efficiency in wireless sensors. [2] and [3] assume that the bio-signals have constant rate of information with minimal noise. This report presents a compressed sensing front-end for bio-signal applications that dynamically adjusts the compression factor, and increases the accuracy of reconstruction by removing noise with spike detection. This report includes the design and simulation of a low power differential ADC and the analysis of the proposed compressed sensing DSP with a 32 nm CMOS process. The DSP is estimated to consume 0.525 W at VDD = 0.4 V. The ADC uses the SAR architecture with a hybrid capacitive array with floating voltage shield, a Strongarm comparator, and digital SAR logic. The ADC consumes 9.8 nW at VDD = 1.05V and has 9.7-bits of resolution running at 20 kHz. Significant power savings are possible with compressed sensing and its influence will be key in driving the revolution of wearable sensors and medical monitoring.}
}

EndNote citation:

%0 Thesis
%A Park, Kevin
%T Compressed Sensing ICs for Bio-Sensor Applications
%I EECS Department, University of California, Berkeley
%D 2014
%8 May 16
%@ UCB/EECS-2014-102
%U http://www.eecs.berkeley.edu/Pubs/TechRpts/2014/EECS-2014-102.html
%F Park:EECS-2014-102