Electrical Engineering
      and Computer Sciences

Electrical Engineering and Computer Sciences

COLLEGE OF ENGINEERING

UC Berkeley

Using FPGAs to Simulate Novel Datacenter Network Architectures At Scale

Zhangxi Tan

EECS Department
University of California, Berkeley
Technical Report No. UCB/EECS-2013-124
June 21, 2013

http://www.eecs.berkeley.edu/Pubs/TechRpts/2013/EECS-2013-124.pdf

The tremendous success of Internet services has led to the rapid growth of Warehouse-Scale Computers (WSCs). The networking infrastructure has become one of the most vital components in a datacenter. With the rapid evolving set of workloads and software, evaluating network designs really requires simulating a computer system with three key features: scale, performance, and accuracy. To avoid the high capital cost of hardware prototyping, many designs have only been evaluated with a very small testbed built with off-the-shelf devices, often running unrealistic microbenchmarks or traces collected from an old cluster. Many evaluations assume the workload is static and that computations are only loosely coupled with the very adaptive networking stack. We argue the research community is facing a hardware-software co-evaluation crisis. In this dissertation, we propose a novel cost-efficient evaluation methodology, called Datacenter-in-a-Box at Low cost (DIABLO), which uses Field-Programmable Gate Arrays (FPGAs) and treats datacenters as whole computers with tightly integrated hardware and software. Instead of prototyping everything in FPGAs, we build realistic reconfigurable abstracted performance models at scales of O(10,000) servers. Our server model runs the full Linux operating system and open-source datacenter software stack, including production software such as memcached. It achieves two orders of magnitude simulation speedup over software-based simulators. This speedup enables us to run the full datacenter software stack for O(100) seconds of simulated time. We have built a DIABLO prototype of a 2,000-node simulated cluster with runtime-configurable 10 Gbps interconnect using 6 multi-FPGA BEE3 boards.

Advisor: David A. Patterson and Krste Asanović


BibTeX citation:

@phdthesis{Tan:EECS-2013-124,
    Author = {Tan, Zhangxi},
    Title = {Using FPGAs to Simulate Novel Datacenter Network Architectures At Scale},
    School = {EECS Department, University of California, Berkeley},
    Year = {2013},
    Month = {Jun},
    URL = {http://www.eecs.berkeley.edu/Pubs/TechRpts/2013/EECS-2013-124.html},
    Number = {UCB/EECS-2013-124},
    Abstract = {The tremendous success of Internet services has led to the rapid growth of Warehouse-Scale
Computers (WSCs). The networking infrastructure has become one of the most vital components
in a datacenter. With the rapid evolving set of workloads and software, evaluating
network designs really requires simulating a computer system with three key features: scale,
performance, and accuracy. To avoid the high capital cost of hardware prototyping, many
designs have only been evaluated with a very small testbed built with off-the-shelf devices,
often running unrealistic microbenchmarks or traces collected from an old cluster. Many
evaluations assume the workload is static and that computations are only loosely coupled
with the very adaptive networking stack. We argue the research community is facing a
hardware-software co-evaluation crisis.

In this dissertation, we propose a novel cost-efficient evaluation methodology, called
Datacenter-in-a-Box at Low cost (DIABLO), which uses Field-Programmable Gate Arrays
(FPGAs) and treats datacenters as whole computers with tightly integrated hardware and
software. Instead of prototyping everything in FPGAs, we build realistic reconfigurable abstracted
performance models at scales of O(10,000) servers. Our server model runs the full
Linux operating system and open-source datacenter software stack, including production
software such as memcached. It achieves two orders of magnitude simulation speedup over
software-based simulators. This speedup enables us to run the full datacenter software stack
for O(100) seconds of simulated time. We have built a DIABLO prototype of a 2,000-node
simulated cluster with runtime-configurable 10 Gbps interconnect using 6 multi-FPGA BEE3
boards.}
}

EndNote citation:

%0 Thesis
%A Tan, Zhangxi
%T Using FPGAs to Simulate Novel Datacenter Network Architectures At Scale
%I EECS Department, University of California, Berkeley
%D 2013
%8 June 21
%@ UCB/EECS-2013-124
%U http://www.eecs.berkeley.edu/Pubs/TechRpts/2013/EECS-2013-124.html
%F Tan:EECS-2013-124