Electrical Engineering
      and Computer Sciences

Electrical Engineering and Computer Sciences

COLLEGE OF ENGINEERING

UC Berkeley

Roll Printed Electronics: Development and Scaling of Gravure Printing Techniques

Alejandro De la Fuente Vornbrock

EECS Department
University of California, Berkeley
Technical Report No. UCB/EECS-2009-191
December 29, 2009

http://www.eecs.berkeley.edu/Pubs/TechRpts/2009/EECS-2009-191.pdf

To realize the potential cost savings promised by printed electronics, high-speed, large-volume manufacturing methods must be established. Rotary printing techniques such as those used in the graphic arts are ideal candidates. However, very little research has been done on utilizing these techniques for printed electronics because digital processes such ink-jet printing have offered researchers a low-cost flexible solution for demonstrating the printability of their materials, despite the fact that these processes may be difficult to scale for large-volume manufacturing. In this thesis, gravure, a printing process which offers the highest resolution, highest speed, and largest volume production in the graphic arts is demonstrated as a viable technique for printed electronics. In order to make laboratory-scale research with this technique possible, a custom table-top gravure printing press was designed. This press allows for small amounts of ink to be utilized during a print and enables multi-layer prints with a registration accuracy not seen in conventional gravure printing presses and suitable for printed electronics. With this press, printing processes to deposit functional materials for printed circuits are investigated with a focus on developing process modules to manufacture fully printed organic thin film transistors. Considerable effort is made to establish processes to deposit metallic lines with feature sizes below 20 μm and a total surface roughness below 20 nm, uniform thin films of polymer dielectrics with thicknesses as low as 70 nm, and high performance polymer semiconductors. These processes are then integrated to manufacture capacitors suitable for integrated circuit components and organic thin film transistors with operating frequencies as high as 18 kHz.

Advisor: Vivek Subramanian


BibTeX citation:

@phdthesis{De la Fuente Vornbrock:EECS-2009-191,
    Author = {De la Fuente Vornbrock, Alejandro},
    Title = {Roll Printed Electronics: Development and Scaling of Gravure Printing Techniques},
    School = {EECS Department, University of California, Berkeley},
    Year = {2009},
    Month = {Dec},
    URL = {http://www.eecs.berkeley.edu/Pubs/TechRpts/2009/EECS-2009-191.html},
    Number = {UCB/EECS-2009-191},
    Abstract = {	To realize the potential cost savings promised by printed electronics, high-speed, large-volume manufacturing methods must be established.  Rotary printing techniques such as those used in the graphic arts are ideal candidates.  However, very little research has been done on utilizing these techniques for printed electronics because digital processes such ink-jet printing have offered researchers a low-cost flexible solution for demonstrating the printability of their materials, despite the fact that these processes may be difficult to scale for large-volume manufacturing.  
	In this thesis, gravure, a printing process which offers the highest resolution, highest speed, and largest volume production in the graphic arts is demonstrated as a viable technique for printed electronics.  In order to make laboratory-scale research with this technique possible, a custom table-top gravure printing press was designed.  This press allows for small amounts of ink to be utilized during a print and enables multi-layer prints with a registration accuracy not seen in conventional gravure printing presses and suitable for printed electronics.  With this press, printing processes to deposit functional materials for printed circuits are investigated with a focus on developing process modules to manufacture fully printed organic thin film transistors.  Considerable effort is made to establish processes to deposit metallic lines with feature sizes below 20 μm and a total surface roughness below 20 nm, uniform thin films of polymer dielectrics with thicknesses as low as 70 nm, and high performance polymer semiconductors.  These processes are then integrated to manufacture capacitors suitable for integrated circuit components and organic thin film transistors with operating frequencies as high as 18 kHz.}
}

EndNote citation:

%0 Thesis
%A De la Fuente Vornbrock, Alejandro
%T Roll Printed Electronics: Development and Scaling of Gravure Printing Techniques
%I EECS Department, University of California, Berkeley
%D 2009
%8 December 29
%@ UCB/EECS-2009-191
%U http://www.eecs.berkeley.edu/Pubs/TechRpts/2009/EECS-2009-191.html
%F De la Fuente Vornbrock:EECS-2009-191