L2 Cache to Off-chip Memory Networks for Chip Multiprocessor
Carrell Killebrew
EECS Department
University of California, Berkeley
Technical Report No. UCB/EECS-2008-71
May 23, 2008
http://www.eecs.berkeley.edu/Pubs/TechRpts/2008/EECS-2008-71.pdf
Advisor: Krste Asanovic
BibTeX citation:
@mastersthesis{Killebrew:EECS-2008-71,
Author = {Killebrew, Carrell},
Title = {L2 Cache to Off-chip Memory Networks for Chip Multiprocessor},
School = {EECS Department, University of California, Berkeley},
Year = {2008},
Month = {May},
URL = {http://www.eecs.berkeley.edu/Pubs/TechRpts/2008/EECS-2008-71.html},
Number = {UCB/EECS-2008-71}
}
EndNote citation:
%0 Thesis %A Killebrew, Carrell %T L2 Cache to Off-chip Memory Networks for Chip Multiprocessor %I EECS Department, University of California, Berkeley %D 2008 %8 May 23 %@ UCB/EECS-2008-71 %U http://www.eecs.berkeley.edu/Pubs/TechRpts/2008/EECS-2008-71.html %F Killebrew:EECS-2008-71