Electrical Engineering
      and Computer Sciences

Electrical Engineering and Computer Sciences

COLLEGE OF ENGINEERING

UC Berkeley

VHDL Code Generation in the Ptolemy II Environment

Man-Kit Leung, Terry Esther Filiba and Vinayak Nagpal

EECS Department
University of California, Berkeley
Technical Report No. UCB/EECS-2008-140
October 28, 2008

http://www.eecs.berkeley.edu/Pubs/TechRpts/2008/EECS-2008-140.pdf

It is becoming increasingly popular to describe real time signal proessing systems targetted for FPGA or ASIC implementation using structural signal flow graphs. We have implemented support for genera- tion of synthesizeable as well as testbench VHDL code from Ptolemy II models. A helper based approach bor- rowing heavily from the existing Ptolemy II C code generation framework is used. This work demon- strates the extensibility of the helper based code- generation approach and sets the stage for future re- search in synthesis of efficient hardware descriptions from heterogenous visual models.


BibTeX citation:

@techreport{Leung:EECS-2008-140,
    Author = {Leung, Man-Kit and Filiba, Terry Esther and Nagpal, Vinayak},
    Title = {VHDL Code Generation in the Ptolemy II Environment},
    Institution = {EECS Department, University of California, Berkeley},
    Year = {2008},
    Month = {Oct},
    URL = {http://www.eecs.berkeley.edu/Pubs/TechRpts/2008/EECS-2008-140.html},
    Number = {UCB/EECS-2008-140},
    Abstract = {It is becoming increasingly popular to describe real
time signal proessing systems targetted for FPGA
or ASIC implementation using structural signal flow
graphs. We have implemented support for genera-
tion of synthesizeable as well as testbench VHDL code
from Ptolemy II models. A helper based approach bor-
rowing heavily from the existing Ptolemy II C code
generation framework is used. This work demon-
strates the extensibility of the helper based code-
generation approach and sets the stage for future re-
search in synthesis of efficient hardware descriptions
from heterogenous visual models.}
}

EndNote citation:

%0 Report
%A Leung, Man-Kit
%A Filiba, Terry Esther
%A Nagpal, Vinayak
%T VHDL Code Generation in the Ptolemy II Environment
%I EECS Department, University of California, Berkeley
%D 2008
%8 October 28
%@ UCB/EECS-2008-140
%U http://www.eecs.berkeley.edu/Pubs/TechRpts/2008/EECS-2008-140.html
%F Leung:EECS-2008-140