Electrical Engineering
      and Computer Sciences

Electrical Engineering and Computer Sciences

COLLEGE OF ENGINEERING

UC Berkeley

Code Generation for Process Network Models onto Parallel Architectures

Man-Kit Leung, Isaac Liu and Jia Zou

EECS Department
University of California, Berkeley
Technical Report No. UCB/EECS-2008-139
October 28, 2008

http://www.eecs.berkeley.edu/Pubs/TechRpts/2008/EECS-2008-139.pdf

With multi-core and many-core architectures becoming the current focus of research and development, and as vast varieties of architectures and programming models emerging in research, the design space for applications is becoming enormous. From the number of cores, the memory hierarchy, the interconnect to even the programming model and language used are all design choices that need to be optimized for applications in order to fully benefit from parallel architectures. We propose a code generation framework targeting rapid design space exploration and prototyping. From the high level design, code for specific architectures and mappings can be generated and used for comparison. We choose Khan Process Networks[11] as our current specification language, because of its inherit parallelism and expressiveness. Our code generator take advantage of Message Passing Interface (MPI) [6] as the API for implementing message passing across platforms. We show the scalability of the generated MPI code and the ability to extend our framework to allow for tuning and optimization.


BibTeX citation:

@techreport{Leung:EECS-2008-139,
    Author = {Leung, Man-Kit and Liu, Isaac and Zou, Jia},
    Title = {Code Generation for Process Network Models onto Parallel Architectures},
    Institution = {EECS Department, University of California, Berkeley},
    Year = {2008},
    Month = {Oct},
    URL = {http://www.eecs.berkeley.edu/Pubs/TechRpts/2008/EECS-2008-139.html},
    Number = {UCB/EECS-2008-139},
    Abstract = {With multi-core and many-core architectures becoming
the current focus of research and development, and as vast
varieties of architectures and programming models emerging
in research, the design space for applications is becoming
enormous. From the number of cores, the memory hierarchy,
the interconnect to even the programming model
and language used are all design choices that need to be
optimized for applications in order to fully benefit from parallel
architectures. We propose a code generation framework
targeting rapid design space exploration and prototyping.
From the high level design, code for specific architectures
and mappings can be generated and used for
comparison. We choose Khan Process Networks[11] as our
current specification language, because of its inherit parallelism
and expressiveness. Our code generator take advantage
of Message Passing Interface (MPI) [6] as the API for
implementing message passing across platforms. We show
the scalability of the generated MPI code and the ability to
extend our framework to allow for tuning and optimization.}
}

EndNote citation:

%0 Report
%A Leung, Man-Kit
%A Liu, Isaac
%A Zou, Jia
%T Code Generation for Process Network Models onto Parallel Architectures
%I EECS Department, University of California, Berkeley
%D 2008
%8 October 28
%@ UCB/EECS-2008-139
%U http://www.eecs.berkeley.edu/Pubs/TechRpts/2008/EECS-2008-139.html
%F Leung:EECS-2008-139