Electrical Engineering
      and Computer Sciences

Electrical Engineering and Computer Sciences

COLLEGE OF ENGINEERING

UC Berkeley

A Scratchpad Memory Allocation Scheme for Dataflow Models

Shamik Bandyopadhyay, Thomas Huining Feng, Hiren D. Patel and Edward A. Lee

EECS Department
University of California, Berkeley
Technical Report No. UCB/EECS-2008-104
August 25, 2008

http://www.eecs.berkeley.edu/Pubs/TechRpts/2008/EECS-2008-104.pdf

Scratchpad memories are alternatives to caches in real-time embedded processors. They provide better timing predictability and lower energy consumption. However, program code and data must be explicitly moved in the memory hierarchy. Current practice either leaves it up to the programmer to manually manage the memory or to use low-level compiler techniques to create an allocation schedule. In this paper, we show how to leverage the structure and semantics of a dataflow model to make optimal use of scratchpads. We assume the heterochronous dataflow model of computation (or its special cases). To show feasibility of the approach, we formulate an ILP problem to minimize the memory access times. We provide performance comparisons between our memory allocation scheme and caches with LRU replacement policy.


BibTeX citation:

@techreport{Bandyopadhyay:EECS-2008-104,
    Author = {Bandyopadhyay, Shamik and Feng, Thomas Huining and Patel, Hiren D. and Lee, Edward A.},
    Title = {A Scratchpad Memory Allocation Scheme for Dataflow Models},
    Institution = {EECS Department, University of California, Berkeley},
    Year = {2008},
    Month = {Aug},
    URL = {http://www.eecs.berkeley.edu/Pubs/TechRpts/2008/EECS-2008-104.html},
    Number = {UCB/EECS-2008-104},
    Abstract = {Scratchpad memories are alternatives to caches in real-time embedded processors. They provide better timing predictability and lower energy consumption. However, program code and data must be explicitly moved in the memory hierarchy. Current practice either leaves it up to the programmer to manually manage the memory or to use low-level compiler techniques to create an allocation schedule. In this paper, we show how to leverage the structure and semantics of a dataflow model to make optimal use of scratchpads. We assume the heterochronous dataflow model of computation (or its special cases). To show feasibility of the approach, we formulate an ILP problem to minimize the memory access times. We provide performance comparisons between our memory allocation scheme and caches with LRU replacement policy.}
}

EndNote citation:

%0 Report
%A Bandyopadhyay, Shamik
%A Feng, Thomas Huining
%A Patel, Hiren D.
%A Lee, Edward A.
%T A Scratchpad Memory Allocation Scheme for Dataflow Models
%I EECS Department, University of California, Berkeley
%D 2008
%8 August 25
%@ UCB/EECS-2008-104
%U http://www.eecs.berkeley.edu/Pubs/TechRpts/2008/EECS-2008-104.html
%F Bandyopadhyay:EECS-2008-104