Electrical Engineering
      and Computer Sciences

Electrical Engineering and Computer Sciences

COLLEGE OF ENGINEERING

UC Berkeley

Solution Processing Techniques for Low-Cost Circuit Fabrication

David Howard Redinger

EECS Department
University of California, Berkeley
Technical Report No. UCB/EECS-2007-3
January 5, 2007

http://www.eecs.berkeley.edu/Pubs/TechRpts/2007/EECS-2007-3.pdf

With the high performance and cost associated with today's silicon integrated circuits there is a market for lower-performing, yet extremely inexpensive circuits. This work focuses on the materials, processes, and techniques of ultra-low-cost fabrication. In particular the fabrication of devices using inkjet printing and aqueous deposition is addressed in detail. Low-cost RFID tags would enable automated inventory and checkout in retail stores by replacing the ubiquitous UPC barcode. In this work the fabrication of the passive components for RFID tags is achieved primarily by inkjet printing, using a gold nanoparticle ink to generate conductive lines on plastic substrates. After considering the performance requirements of 13.56 MHz RFID passive devices, the all-printed devices are improved by using a combination of inkjet patterning with an electroless copper deposition. The results of this hybrid approach are shown to be far superior to printing alone, generating inductors with quality factors above 20. The concept of solution-processing is then expanded to cover semiconductor and insulator materials, with a focus on transparent TFTs for active-matrix OLED displays. Zinc oxide TFTs are fabricated using chemical bath deposition followed by an anneal in oxygen ambient. Electron mobility as high as 3.5 cm^2/Vs is achieved, and mobility of 1.5 cm^2/Vs is achieved at low anneal temperatures (450 C), enabling the use of cheap glass substrates. These results present a significant improvement over amorphous silicon, and will allow the development of low-power high-resolution OLED displays.

Advisor: Vivek Subramanian


BibTeX citation:

@phdthesis{Redinger:EECS-2007-3,
    Author = {Redinger, David Howard},
    Title = {Solution Processing Techniques for Low-Cost Circuit Fabrication},
    School = {EECS Department, University of California, Berkeley},
    Year = {2007},
    Month = {Jan},
    URL = {http://www.eecs.berkeley.edu/Pubs/TechRpts/2007/EECS-2007-3.html},
    Number = {UCB/EECS-2007-3},
    Abstract = {With the high performance and cost associated with today's silicon integrated circuits there is a market for lower-performing, yet extremely inexpensive circuits.  This work focuses on the materials, processes, and techniques of ultra-low-cost fabrication.  In particular the fabrication of devices using inkjet printing and aqueous deposition is addressed in detail.

Low-cost RFID tags would enable automated inventory and checkout in retail stores by replacing the ubiquitous UPC barcode.  In this work the fabrication of the passive components for RFID tags is achieved primarily by inkjet printing, using a gold nanoparticle ink to generate conductive lines on plastic substrates.  After considering the performance requirements of 13.56 MHz RFID passive devices, the all-printed devices are improved by using a combination of inkjet patterning with an electroless copper deposition.  The results of this hybrid approach are shown to be far superior to printing alone, generating inductors with quality factors above 20.  

The concept of solution-processing is then expanded to cover semiconductor and insulator materials, with a focus on transparent TFTs for active-matrix OLED displays.  Zinc oxide TFTs are fabricated using chemical bath deposition followed by an anneal in oxygen ambient. Electron mobility as high as 3.5 cm^2/Vs is achieved, and mobility of 1.5 cm^2/Vs is achieved at low anneal temperatures (450 C), enabling the use of cheap glass substrates.  These results present a significant improvement over amorphous silicon, and will allow the development of low-power high-resolution OLED displays.}
}

EndNote citation:

%0 Thesis
%A Redinger, David Howard
%T Solution Processing Techniques for Low-Cost Circuit Fabrication
%I EECS Department, University of California, Berkeley
%D 2007
%8 January 5
%@ UCB/EECS-2007-3
%U http://www.eecs.berkeley.edu/Pubs/TechRpts/2007/EECS-2007-3.html
%F Redinger:EECS-2007-3